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| freescale semiconductor data sheet: advance information document number: MPC5607B rev. 3, 01/2010 ? freescale semiconductor, inc., 2010. all rights reserved. preliminary?subject to change without notice this document contains information on a prod uct under development. freescale reserves the right to change or discontinue this product without notice. MPC5607B 176lqfp (24 x 24) 144 lqfp (20 x 20 ) 100 lqfp (14 x 14 ) 208 mapbga (17 x 17 ) features ? single issue, 32-bit cpu core complex (e200z0h) ? compliant with the power architecture? embedded category ? enhanced instruction set allowing variable length encoding (vle) for code size footprint reduction. with the optional encoding of mixed 16-bit and 32-bit instructions, it is possible to achieve significant code size footprint reduction. ? up to 1.5 mbytes on-chip flash supported with the flash controller ? up to 96 kbytes on-chip sram ? memory protection unit (mpu) with 8 region descriptors and 32-byte region granularity on certain family members ? interrupt controller (intc) capable of handling 204 selectable-priority interrupt sources ? frequency modulated phase-locked loop (fmpll) ? crossbar switch architecture for concurrent access to peripherals, flash, or ram from multiple bus masters ? 16-channel edma controller with multiple transfer request sources using dma multiplexer ? boot assist module (bam) supports internal flash programming via a serial link (can or sci) ? timer supports i/o channels providing a range of 16-bit input capture, output compare, and pulse width modulation functions (emios) ? 2 analog-to-digital converte rs (adc): one 10-bit and one 12-bit ? cross trigger unit to enable synchronization of adc conversions with a timer event from the emios or pit ? up to 6 serial periphera l interface (dspi) modules ? up to 10 serial communication interface (linflex) modules ? up to 6 enhanced full can (flexcan) modules with configurable buffers ? 1 inter-integrated circuit (i 2 c) interface module ? up to 149 configurable general purpose pins supporting input and output operations (package dependent) ? real-time counter (rtc) ? clock source from inte rnal 128 khz or 16 mhz oscillator supporting autonomous wakeup with 1 ms resolution with maximum timeout of 2 seconds ? optional support for rtc with clock source from external 32 khz crystal oscillator, supporting wakeup with 1 sec resolution and maximum timeout of 1 hour ? up to 8 periodic interrupt timers (pit) with 32-bit counter resolution ? nexus development interface (ndi) per ieee-isto 5001-2003 class two plus ? device/board boundary scan testing supported per joint test action group (jtag) of ieee (ieee 1149.1) ? on-chip voltage regulator (vreg) for regulation of input supply for all internal levels MPC5607B microcontroller data sheet because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages
MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 2 table of contents 1 general description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2 package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 2.1 176lqfp pin configuration . . . . . . . . . . . . . . . . . . . . . . .8 2.2 144lqfp pin configuration . . . . . . . . . . . . . . . . . . . . . . .9 2.3 208mapbga pin configuration . . . . . . . . . . . . . . . . . . .10 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.1 parameter classification . . . . . . . . . . . . . . . . . . . . . . . .11 3.2 nvusro register . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.2.1 nvusro[pad3v5v] field description . . . . . . . .11 3.2.2 nvusro[oscillator_margin] field description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 3.2.3 nvusro[watchdog_en] field description . .12 3.3 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .13 3.4 recommended operating conditions . . . . . . . . . . . . . .14 3.5 thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . .17 3.5.1 external ballast resistor recommendations . . . .17 3.5.2 package thermal characteristics . . . . . . . . . . . .17 3.5.3 power considerations. . . . . . . . . . . . . . . . . . . . .18 3.6 i/o pad electrical characteristics . . . . . . . . . . . . . . . . . .18 3.6.1 i/o pad types . . . . . . . . . . . . . . . . . . . . . . . . . . .18 3.6.2 i/o input dc characteristics . . . . . . . . . . . . . . . .19 3.6.3 i/o output dc characteristics. . . . . . . . . . . . . . .21 3.6.4 output pin transition times . . . . . . . . . . . . . . . . .23 3.6.5 i/o pad current specification . . . . . . . . . . . . . . .24 3.7 nrstin electrical characteristics . . . . . . . . . . . . . . . . .27 3.8 power management electrical characteristics. . . . . . . .30 3.8.1 voltage regulator electrical characteristics . . . .30 3.8.2 voltage monitor electrical characteristics. . . . . .33 3.9 low voltage domain power consumption . . . . . . . . . . .35 3.10 flash memory electrical characteristics . . . . . . . . . . . .37 3.10.1 program/erase characteristics. . . . . . . . . . . . . .37 3.10.2 flash power supply dc characteristics . . . . . . .38 3.10.3 start-up/switch-off timings . . . . . . . . . . . . . . . . 40 3.11 electromagnetic compatibility (emc) characteristics. . 40 3.11.1 designing hardened software to avoid noise problems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 3.11.2 electromagnetic interference (emi) . . . . . . . . . 41 3.11.3 absolute maximum ratings (electrical sensitivity)41 3.12 fast external crystal oscillator (4 to 16 mhz) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 3.13 slow external crystal oscillator (32 khz) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 3.14 fmpll electrical characteristics . . . . . . . . . . . . . . . . . 48 3.15 fast internal rc oscillator (16 mhz) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 3.16 slow internal rc oscillator (128 khz) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 3.17 adc electrical characteristics . . . . . . . . . . . . . . . . . . . 50 3.17.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 3.17.2 input impedance and adc accuracy . . . . . . . . 51 3.17.3 adc electrical characteristics . . . . . . . . . . . . . 56 3.18 on-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 3.18.1 current consumption . . . . . . . . . . . . . . . . . . . . 64 3.18.2 dspi characteristics. . . . . . . . . . . . . . . . . . . . . 66 3.18.3 nexus characteristics . . . . . . . . . . . . . . . . . . . . 73 3.18.4 jtag characteristics. . . . . . . . . . . . . . . . . . . . . 74 4 package characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 4.1 package mechanical data . . . . . . . . . . . . . . . . . . . . . . 75 4.1.1 176 lqfp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 4.1.2 144 lqfp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 4.1.3 100 lqfp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 4.1.4 208mapbga . . . . . . . . . . . . . . . . . . . . . . . . . . 86 5 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages general description MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 3 1 general description the MPC5607B is a new family of next generation microcontrollers built on the power architecture? embedded category. this document describes the features of the family and options available within the family members, and highlights important electrical and physical char acteristics of the device. the MPC5607B family of 32-bit microcontrollers is the latest achie vement in integrated automotive application controllers. it belongs to an expanding family of automotive-focused produc ts designed to address the next wave of body electronics applications within the vehicle. the advanced and cost-efficient host processor core of the MPC5607B automotive controller family complies with the power archit ecture embedded category and only implements the vle (variable-length encoding) apu (auxillary processor unit), providing improved code dens ity. it operates at speeds of up to 64 mhz and offers high performance processing optimized for low power consumption. it capitalizes on the available development infrastructure of current power architecture devices and is s upported with software drivers, operating sy stems and configuration code to assist with users implementations. table 1. MPC5607B family comparison 1 feature mpc5605b mpc5606b MPC5607B package 100 lqfp 144 lqfp 176 lqfp 144 lqfp 176 lqfp 176 lqfp 208 map bga 2 cpu e200z0h execution speed 3 up to 64 mhz code flash 768 kb 1 mb 1.5 mb data flash 64 (4 x 16) kbyte ram 64 kb 80 kb 96 kb mpu 8-entry dma 16 ch 10-bit adc yes dedicated 4 7ch 15ch 29ch 15ch 29ch shared with 12-bit adc 19 ch 12-bit adc yes dedicated 5 5 ch shared with 10-bit adc 19 ch total timer i/o 6 emios 37 ch, 16-bit 64 ch, 16-bit counter / opwm / icoc 7 10 ch o(i)pwm / opwfmb / opwmcb / icoc 8 7ch o(i)pwm / icoc 9 7ch 14ch opwm / icoc 10 13 ch 33 ch sci (linflex) 46868 10 spi (dspi) 3565 6 can (flexcan) 6 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice general description freescale semiconductor 4 1.1 block diagram figure 1 shows a top-level block diagram of the MPC5607B. i 2 c1 32 khz oscillator yes gpio 11 77 121 149 121 149 149 debug jtag n2+ 1 feature set dependent on selected peripheral multiplexing; table shows example. 2 208 mapbga package is for debug use only. 3 based on 105 c ambient operating temperature. 4 not shared with 12-bit adc, but possibl y shared with other alternate functions. 5 not shared with 10-bit adc, but possibl y shared with other alternate functions. 6 refer to emios section of device reference manual for information on the channel configuration and functions. 7 each channel supports a range of modes including modu lus counters, pwm generation, input capture, output compare. 8 each channel supports a range of modes including pw m generation with dead time, input capture, output compare. 9 each channel supports a range of modes including pwm gen eration, input capture, output compare, period and pulse width measurement. 10 each channel supports a range of modes including pwm generation, input capture, and output compare. 11 maximum i/o count based on multiplexing with peripherals. table 1. MPC5607B family comparison 1 (continued) feature mpc5605b mpc5606b MPC5607B because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages general description MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 5 figure 1. MPC5607B block diagram 6 x dspi fmpll nexus 2+ nexus ram siul reset control 96 kb external imux gpio & jtag pad control jtag port nexus port e200z0h interrupt requests 64-bit 2 x 3 crossbar switch 6 x flexcan peripheral bridge interrupt request interrupt request i/o clocks instructions data voltage regulator nmi swt pit stm nmi siul . . . intc i 2 c . . . 10 x linflex 64 ch 29 ch 10-bit mpu cmu sram flash code flash 1.5 mb dataflash 64 kb mc_pcu mc_me mc_cgm mc_rgm bam ctu rtc sscm (master) (master) (slave) (slave) (slave) controller controller legend: adc analog-to-digital converter bam boot assist module can controller area network (flexcan) cmu clock monitor unit ctu cross triggering unit dspi deserial serial peripheral interface emios enhanced modular input output system fmpll frequency-modulated phase-locked loop i2c inter-integrated circuit bus imux internal multiplexer intc interrupt controller jtag jtag controller linflex serial communication interface (lin support) mc_cgm clock generation module mc_me mode entry module mpu memory protection unit nexus nexus development interface (ndi) level nmi non-maskable interrupt mc_pcu power control unit mc_rgm reset generation module pit periodic interrupt timer rtc real-time clock siul system integration unit lite sram static random-access memory sscm system status configuration module stm system timer module swt software watchdog timer mpu ecsm from peripheral registers blocks adc emios edma 19 ch 10bit/12bit adc (master) . . . . . . . . . wkpu because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice general description freescale semiconductor 6 table 2 summarizes the functions of th e blocks present on the MPC5607B. table 2. MPC5607B series block summary block function analog-to-digital converter (adc) converts analog voltages to digital values boot assist module (bam) a block of read-only memory containing vle code which is executed according to the boot mode of the device clock generation module (mc_cgm) provides logic and contro l required for the generatio n of system and peripheral clocks crossbar switch (xbar) supports si multaneous connections between two master po rts and three slave ports. the crossbar supports a 32-bit address bus width and a 64-bit data bus width. cross triggering unit (ctu) enables synchronization of adc conversions with a timer event from the emios or from the pit deserial serial peripheral interface (dspi) provides a synchronous serial interface for communication with external devices enhanced modular input output system (emios) provides the functionality to generate or measure events flash memory provides non-volatile storage for program code, constants and variables flexcan (controller area network) supports the standard can communications protocol frequency-modulated phase-locked loop (fmpll) generates high-speed system clocks and supports programmable frequency modulation internal multiplexer (imux) siu subblock allows flexible mapping of peripheral interface on the different pins of the device inter-integrated circuit (i 2 c?) bus a two wire bidirectional serial bus that provides a simple and efficient method of data exchange between devices interrupt controller (intc) provides priority-based preemptive scheduling of interrupt requests jtag controller provides the means to test chip functionality and connectivity while remaining transparent to syst em logic when not in test mode linflex controller manages a high number of lin (local interconnect network protocol) messages efficiently with a minimum of cpu load memory protection unit (mpu) provides hardware access control for all memory references generated in a device periodic interrupt timer (pit) produces periodic interrupts and triggers real-time counter (rtc) a free running counter used for time keeping applications, the rtc can be configured to generate an interrupt at a predefined interval independent of the mode of operation (run mode or low-power mode) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package pinouts MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 7 2 package pinouts the available lqfp pinouts and the 208 mapbga ballmap are provided in the following figures. for pin signal descriptions, please refer to the device reference manual. reset generation module (mc_rgm) centralizes reset sources and manages the device reset sequence of the device static random-access memory (sram) provides storage for program code, constants, and variables system integration unit lite (siul) provides control over all the electrical pad controls and up 32 ports with 16 bits of bidirectional, general-purpose input and output signals and supports up to 32 external interrupts with trigger event configuration system timer module (stm) provides a set of output compare events to support autosar and operating system tasks table 2. MPC5607B series block summary (continued) block function because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package pinouts freescale semiconductor 8 2.1 176lqfp pin configuration figure 2. 176 lqfp pin configuration (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 pa[11]/gpio[11]/e0uc[11]/scl/eirq[16]/lin2rx/adc1_s[3] pa[10]/gpio[10]/e0uc[10]/sda/lin2tx/adc1_s[2] pa[9]/gpio[9]/e0uc[9]/cs2_1/fab pa[8]/gpio[8]/e0uc[8]/e0uc[14]/eirq[3]/abs[0]/lin3rx pa[7]/gpio[7]/e0uc[7]/lin3tx/eirq[2]/adc1_s[1] pe[13]/gpio[77]/sout_2/e1uc[20] pf[14]/gpio[94]/can4tx/e1uc[27]/can1tx pf[15]/gpio[95]/e1uc[4]/eirq[13]/can4rx/can1rx vdd_hv vss_hv pg[0]/gpio[96]/can5tx/e1uc[23] pg[1]/gpio[97]/e1uc[24]/eirq[14]/can5rx ph[3]/gpio[115]/e1uc[5]/cs0_1 ph[2]/gpio[114]/e1uc[4]/sck_1 ph[1]/gpio[113]/e1uc[3]/sout_1 ph[0]/gpio[112]/e1uc[2]/sin_1 pg[12]/gpio[108]/e0uc[26]/sout_4 pg[13]/gpio[109]/e0uc[27]/sck_4 pa[3]/gpio[3]/e0uc[3]/lin5tx/cs4_1/eirq[0]/adc1_s[0] pi[13]/gpio[141]/cs1_3/adc0_s[21] pi[12]/gpio[140]/cs0_3/adc0_s20] pi[11]/gpio[139]/ans[19]/sin_3 pi[10]/gpio[138]/adc0_s[18] pi[9]/gpio[137]/adc0_s[17] pi[8]/gpio[136]/adc0_s[16] pb[15]/gpio[31]/e0uc[7]/cs4_0/adc0_x[3] pd[15]/gpio[63]/cs2_1/e0uc[27]/adc0_s[7] pb[14]/gpio[30]/e0uc[6]/cs3_ 0/adc0_x[2] pd[14]/gpio[62]/cs1_1/e0uc[26]/adc0_s[6] pb[13]/gpio[29]/e0uc[5]/cs2_0/adc0_x[1] pd[13]/gpio[61]/cs0_1/e0uc[25]/adc0_s[5] pb[12]/gpio[28]/e0uc[4]/cs1_0/adc0_x[0] pd[12]/gpio[60]/cs5_0/e0uc[24]/adc0_s[4] vdd_hv_adc1 vss_hv_adc1 pb[11]/gpio[27]/e0uc[3]/cs0_0/adc0_s[3] pd[11]/gpio[59]/adc0_p[15]/adc1_p[15] pd[10]/gpio[58]/adc0_p[14]/adc1_p[14] pd[9]/gpio[57]/adc0_p[13]/adc1_p[13] pb[7]/gpio[23]/adc0_p[3]/adc1_p[3] pb[6]/gpio[22]/adc0_p[2]/adc1_p[2] pb[5]/gpio[21]/adc0_p[1]/adc1_p[1] vdd_hv_adc0 vss_hv_adc0 lin0rx/wkup[11]/scl/e0uc[31]/gpio[19]/pb[3] lin2rx/wkup[13]/e0uc[7]/gpio[41]/pc[9] eirq[8]/sck2/e0uc[14]/gpio[46]/pc[14] eirq[20]/cs0_2/e0uc[15]/gpio[47]/pc[15] e1uc[18]/sck_5/gpio[148]/pj[4] vdd_hv vss_hv e1uc[17]/sout_5/gpio[127]/ph[15] e1uc[26]/cs0_3/sout_4/gpio[125]/ph[13] e1uc[27]/cs1_3/sck_4/gpio[126]/ph[14] cs0_4/e1uc[30]/gpio[134]/pi[6] cs1_4/e1uc[31]/gpio[135]/pi[7] sin_3/wkup[18]/e1uc[14]/gpio[101]/pg[5] sck_3/e1uc[13]/gpio[100]/pg[4] wkup[17]/cs0_3/e1uc[12]/gpio[99]/pg[3] sout_3/e1uc[11]/gpio[98]/pg[2] ma[2]/wkup[3]/e0uc[2]/gpio[2]/pa[2] can5rx/wkup[6]/e0uc[16]/gpio[64]/pe[0] wkup[2]/nmi/e0uc[1]/gpio[1]/pa[1] can5tx/e0uc[17]/gpio[65]/pe[1] can3tx/e0uc[22]/can2tx/gpio[72]/pe[8] can3rx/can2rx/wkup[7]/e0uc[23]/gpio[73]/pe[9] eirq[10]/e1uc[30]/cs3_1/lin3tx/gpio[74]/pe[10] wkup[19]/e0uc[13]/clkout/e0uc[0]/gpio[0]/pa[0] lin3rx/wkup[14]/cs4_1/e0uc[24]/gpio[75]/pe[11] vss_hv vdd_hv vss_hv reset vss_lv vdd_lv vdd_bv lin7rx/wkup[21]/sck_2/e1uc[18]/gpio[105]/pg[9] eirq[15]/cs0_2/lin7tx/e1uc[17]/gpio[104]/pg[8] can4rx/can1rx/wkup[5]/ma[2]/gpio[43]/pc[11] ma[1]/can4tx/can1tx/gpio[42]/pc[10] lin6rx/wkup[20]/e1uc[30]/e1uc[16]/gpio[103]/pg[7] lin6tx/e1uc[15]/gpio[102]/pg[6] lin0tx/e0uc[30]/can0tx/gpio[16]/pb[0] can0rx/wkup[4]/lin0rx/e0uc[31]/gpio[17]/pb[1] can2rx/can3rx/wkup[22]/cs5_0/e1uc[1]/gpio[89]/pf[9] can2tx/cs4_0/can3tx/gpio[88]/pf[8] lin5tx/e1uc[25]/gpio[92]/pf[12] e1uc[28]/lin1tx/gpio[38]/pc[6] lin1rx/wkup[12]/e1uc[29]/gpio[39]/pc[7] e1uc[2]/lin4tx/cs1_0/gpio[90]/pf[10] lin4rx/wkup[15]/e1uc[3]/cs2_0/gpio[91]/pf[11] wkup[10]/e0uc[1]/sck_0/cs0_0/gpio[15]/pa[15] lin5rx/wkup[16]/e1uc[26]/gpio[93]/pf[13] eirq[4]/e0uc[0]/cs0_0/sck_0/gpio[14]/pa[14] lin5rx/wkup[9]/cs0_1/e0uc[4]/gpio[4]/pa[4] e0uc[29]/sout_0/gpio[13]/pa[13] eirq[17]/sin_0/cs3_1/e0uc[28]/gpio[12]/pa[12] vdd_lv vss_lv xtal vss_hv extal vdd_hv adc1_s[5]/osc32k_extal/wkup[26]/adc0_s[1]/gpio[25]/pb[9] adc1_s[4]/osc32k_xtal/wkup[25]/adc_s[0]/gpio[24]/pb[8] adc0_s[6]/wkup[8]/ans[2]/gpio[26]/pb[10] adc0_s[8]/cs3_1/e0uc[10]/gpio[80]/pf[0] adc0_s[9]/cs4_1/e0uc[11]/gpio[81]/pf[1] adc0_s[10]/cs0_2/e0uc[12]/gpio[82]/pf[2] adc0_s[11]/cs1_2/e0uc[13]/gpio[83]/pf[3] adc0_s[12]/cs2_2/e0uc[14]/gpio[84]/pf[4] adc0_s[13]/cs3_2/e0uc[22]/gpio[85]/pf[5] adc0_s14]/cs1_1/e0uc[23]/gpio[86]/pf[6] adc0_s[15]/cs2_1/gpio[87]/pf[7] adc0_s[27]/cs1_5/gpio[147]/pj[3] adc0_s[26]/cs0_5/gpio[146]/pj[2] sin_5/ans[25]/gpio[145]/pj[1] adc0_s[24]/cs1_4/gpio[144]/pj[0] adc0_s[23]/cs0_4/gpio[143]/pi[15] sin_4/ans[22]/gpio[142]/pi[14] anp[4]/wkup[27]/gpio[48]/pd[0] adc1_p[5]/adc0_p[5]/wkup[28]/gpio[49]/pd[1] adc1_p[6]/adc0_p[6]/gpio[50]/pd[2] adc1_p[8]/adc0_p[7]/gpio[51]/pd[3] adc1_p[8]/adc0_p[8]/gpio[52]/pd[4] adc1_p[9]/adc0_p[9]/gpio[53]/pd[5] adc0_p[10]/adc0_p[10]/gpio[54]/pd[6] adc1_p[11]/adc0_p[11]/gpio[55]/pd[7] vdd_hv vss_hv adc1_p[12]/adc0_p[12]/gpio[56]/pd[8] adc1_p[0]/adc0_p[0]/gpio[20]/pb[4] pb[2]/gpio[18]/lin0tx/sda/e0uc[30] pc[8]/gpio[40]/lin2tx/e0uc[3] pc[13]/gpio[45]/e0uc[13]/sout_2 pc[12]/gpio[44]/e0uc[12]/eirq[19]/sin_2 pi[0]/gpio[128]/e0uc[28]/lin8tx pi[1]/gpio[129]/e0uc[29]/wkup[24]/lin8rx pi[2]/gpio[130]/e0uc[30]/lin9tx pi[3]/gpio[131]/e0uc[31]/wkup[23]/lin9rx pe[7]/gpio[71]/e0uc[23]/cs2_0/ma[0]/eirq[23] pe[6]/gpio[70]/e0uc[22]/cs3_0/ma[1]/eirq[22] ph[8]/gpio[120]/e1uc[10]/cs2_2/ma[0] ph[7]/gpio[119]/e1uc[9]/cs3_2/ma[1] ph[6]/gpio[118]/e1uc[8]/ma[2] ph[5]/gpio[117]/e1uc[7] ph[4]/gpio[116]/e1uc[6] pe[5]/gpio[69]/e0uc[21]/cs0_1/ma[2] pe[4]/gpio[68]/e0uc[20]/sck_1/eirq[9] pc[4]/gpio[36]/e1uc[31]/eirq[18]/sin_1/can3rx pc[5]/gpio[37]/sout_1/can3tx/eirq[7] pe[3]/gpio[67]/e0uc[19]/sout_1 pe[2]/gpio[66]/e0uc[18]/eirq[21]/sin_1 ph[9]/gpio[121]/tck pc[0]/gpio[32]/tdi vss_lv vdd_lv vdd_hv vss_hv pc[1]/gpio[33]/tdo ph[10]/gpio[122]/tms pa[6]/gpio[6]/e0uc[6]/cs1_1/eirq[1]/lin4rx pa[5]/gpio[5]/e0uc[5]/lin4tx pc[2]/gpio[34]/sck_1/can4tx/eirq[5] pc[3]/gpio[35]/cs0_1/ma[0]/eirq[6]/can4rx/can1rx pi[4]/gpio[132]/e1uc[28]/sout_4 pi[5]/gpio[133]/e1uc[29]/sck_4 ph[12]/gpio[124]/sck_3/cs1_4/e1uc[25] ph[11]/gpio[123]/sout_3/cs0_4/e1uc[5] pg[11]/gpio[107]/e0uc[25]/cs0_4 pg[10]/gpio[106]/e0uc[24]/e1uc[31]/sin_4 pe[15]/gpio[79]/cs0_2/e1uc[22] pe[14]/gpio[78]/sck_2/e1uc[21]/eirq[12] pg[15]/gpio[111]/e1uc[1]/lin8rx pg[14]/gpio[110]/e1uc[0]/lin8tx pe[12]/gpio[76]/e1uc[19]/eirq[11]/sin_2/adc1_s[7] 176 lqfp top view note: availability of port pin alternate functions depends on product selection. because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package pinouts MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 9 2.2 144lqfp pin configuration figure 3. 144 lqfp pin configuration (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 lin0rx/wkup[11]/scl/e0uc[31]/gpio[19]/pb[3] lin2rx/wkup[13]/e0uc[7]/gpio[41]/pc[9] eirq[8]/sck2/e0uc[14]/gpio[46]/pc[14] eirq[20]/cs0_2/e0uc[15]/gpio[47]/pc[15] sin_3/wkup[18]/e1uc[14]/gpio[101]/pg[5] sck_3/e1uc[13]/gpio[100]/pg[4] wkup[17]/cs0_3/e1uc[12]/gpio[99]/pg[3] sout_3/e1uc[11]/gpio[98]/pg[2] ma[2]/wkup[3]/e0uc[2]/gpio[2]/pa[2] can5rx/wkup[6]/e0uc[16]/gpio[64]/pe[0] wkup[2]/nmi[0]/e0uc[1]/gpio[1]/pa[1] can5tx/e0uc[17]/gpio[65]/pe[1] can3tx/e0uc[22]/can2tx/gpio[72]/pe[8] can3rx/can2rx/wkup[7]/e0uc[23]/gpio[73]/pe[9] eirq[10]/e1uc[30]/cs3_1/lin3tx/gpio[74]/pe[10] wkup[19]/e0uc[13]/clkout/e0uc[0]/gpio[0]/pa[0] lin3rx/wkup[14]/cs4_1/e0uc[24]/gpio[75]/pe[11] vss_hv vdd_hv vss_hv reset vss_lv vdd_lv vdd_bv lin7rx/eirq[21]/sck_2/e1uc[18]/gpio[105]/pg[9] eirq[15]/cs0_2/lin7tx/e1uc[17]/gpio[104]/pg[8] can4rx/can1rx/wkup[5]/ma[2]/gpio[43]/pc[11] ma[1]/can4tx/can1tx/gpio[42]/pc[10] lin6rx/wkup[20]/e1uc[30]/e1uc[16]/gpio[103]/pg[7] lin6tx/e1uc[15]/gpio[102]/pg[6] e0uc[30]/can0tx/gpio[16]/pb[0] lin0rx/can0rx/wkup[4]/e0uc[31]/gpio[17]/pb[1] can2rx/can3rx/wkup[22]/cs5_0/e1uc[1]/gpio[89]/pf[9] can2tx/cs4_0/can3tx/gpio[88]/pf[8] lin5tx/e1uc[25]/gpio[92]/pf[12] e1uc[28]/lin1tx/gpio[38]/pc[6] pa[11]/gpio[11]/e0uc[11]/scl/eirq[16]/lin2rx/adc1_s[3] pa[10]/gpio[10]/e0uc[10]/sda/lin2tx/adc1_s[2] pa[9]/gpio[9]/e0uc[9]/fab/cs2_1 pa[8]/gpio[8]/e0uc[8]/e0uc[14]/eirq[3]/abs[0]/lin3rx pa[7]/gpio[7]/e0uc[7]/lin3tx/eirq[2]/adc1_s[1] pe[13]/gpio[77]/sout_2/e1uc[20] pf[14]/gpio[94]/can4tx/e1uc[27]/can1tx pf[15]/gpio[95]/e1uc[4]/eirq[13]/can4rx/can1rx vdd_hv vss_hv pg[0]/gpio[96]/can5tx/e1uc[23] pg[1]/gpio[97]/e1uc[24]/eirq[14]/can5rx ph[3]/gpio[115]/e1uc[5]/cs0_1 ph[2]/gpio[114]/e1uc[4]/sck_1 ph[1]/gpio[113]/e1uc[3]/sout_1 ph[0]/gpio[112]/e1uc[2]/sin_1 pg[12]/gpio[108]/e0uc[26]/sout_4 pg[13]/gpio[109]/e0uc[27]/sck_4 pa[3]/gpio[3]/e0uc[3]/lin5tx/eirq[0]/cs4_1/adc1_s[0] pb[15]/gpio[31]/e0uc[7]/cs4_0/adc0_x[3] pd[15]/gpio[63]/cs2_1/e0uc[27]/adc0_s[7] pb[14]/gpio[30]/e0uc[6]/cs3_ 0/adc0_x[2] pd[14]/gpio[62]/cs1_1/e0uc[26]/adc0_s[6] pb[13]/gpio[29]/e0uc[5]/cs2_0/adc0_x[1] pd[13]/gpio[61]/cs0_1/e0uc[25]/adc0_s[5] /gpio[28]/e0uc[4]/cs1_0 vdd_hv_adc1 vss_hv_adc1 pd[11]/gpio[59]/adc0_p[15]/adc1_p[15] pd[10]/gpio[58]/adc0_p[14]/adc1_p[14] pd[9]/gpio[57]/adc0_p[13]/adc1_p[13] pb[7]/gpio[23]/adc0_p[3]/adc1_p[3] pb[6]/gpio[22]/adc0_p[2]/adc1_p[2] pb[5]/gpio[21]/adc0_p[1]/adc1_p[1] vdd_hv_adc0 vss_hv_adc0 lin1rx/wkup[12]/e1uc[29]/gpio[39]/pc[7] e1uc[2]/lin4tx/cs1_0/gpio[90]/pf[10] emios[1]\lin4rx/wkup[15]/e1uc[3]/cs2_0/gpio[91]/pf[11] wkup[10]/e0uc[1]/sck_0/cs0_0/gpio[15]/pa[15] lin5rx/wkup[16]/e1uc[26]/gpio[93]/pf[13] eirq[4]/e0uc[0]/cs0_0/sck_0/gpio[14]/pa[14] cso_1\lin5rx/wkup[9]/e0uc[4]/gpio[4]/pa[4] e0uc[29]/sout_0/gpio[13]/pa[13] cs3_1\eirq[17]/sin_0/e0uc[28]/gpio[12]/pa[12] vdd_lv vss_lv xtal vss_hv extal vdd_hv eirq[26]\adc1_s[5]\osc32k_extal//wkup[26]/adc0_s[1]/gpio[25]/pb[9] eirq[25]\osc32k_xtal//wkup[25]/ans[0]/gpio[24]/pb[8] adc1_s[6]\wkup[8]/adc0_s[2]/gpio[26]/pb[10] adc0_s[8]/cs3_1/e0uc[10]/gpio[80]/pf[0] adc0_s[9]/cs4_1/e0uc[11]/gpio[81]/pf[1] adc0_s[10]/cs0_2/e0uc[12]/gpio[82]/pf[2] adc0_s[11]/cs1_2/e0uc[13]/gpio[83]/pf[3] adc0_s[12]/cs2_2/e0uc[14]/gpio[84]/pf[4] adc0_s[13]/cs3_2/e0uc[22]/gpio[85]/pf[5] adc0_s[14]/cs1_1/e0uc[23]/gpio[86]/pf[6] adc0_s[15]/cs2_1/gpio[87]/pf[7] eirq[27]\anp[4]//wkup[27]/gpio[48]/pd[0] eirq[28]\anp[5]/wkup[28]/gpio[49]/pd[1] adc1_p[7]/adc0_p[6]/gpio[50]/pd[2] adc1_p[7]/adc0_p[7]/gpio[51]/pd[3] adc1_p[8]/adc0_p[8]/gpio[52]/pd[4] adc1_p[9]/adc0_p[9]/gpio[53]/pd[5] adc1_p[10]/adc0_p[10]/gpio[54]/pd[6] adc1_p[11]/adc0_p11]/gpio[55]/pd[7] adc1_p[12]/adc0_p[12]/gpio[56]/pd[8] adc1_p[0]/adc0_p[0]/gpio[20]/pb[4] pb[2]/gpio[18]/lin0tx/sda/e0uc[30] pc[8]/gpio[40]/lin2tx/e0uc[3] pc[13]/gpio[45]/e0uc[13]/sout_2 pc[12]/gpio[44]/e0uc[12]/eirq[19]/sin_2 pe[7]/gpio[71]/e0uc[23]/cs2_0/ma[0]/eirq[23] pe[6]/gpio[70]/e0uc[22]/cs3_0/ma[1]/eirq[22] ph[8]/gpio[120]/e1uc[10]/cs2_2/ma[0] ph[7]/gpio[119]/e1uc[9]/cs3_2/ma[1] ph[6]/gpio[118]/e1uc[8]/ma[2] ph[5]/gpio[117]/e1uc[7] ph[4]/gpio[116]/e1uc[6] pe[5]/gpio[69]/e0uc[21]/cs0_1/ma[2] pe[4]/gpio[68]/e0uc[20]/sck_1/eirq[9] pc[4]/gpio[36]/e1uc[31]/eirq[18]/sin_1/can3rx pc[5]/gpio[37]/sout_1/can3tx/eirq[7] pe[3]/gpio[67]/e0uc[19]/sout_1 pe[2]/gpio[66]/e0uc[18]/eirq[21]/sin_1 ph[9]/gpio[121]/tck pc[0]/gpio[32]/tdi vss_lv vdd_lv vdd_hv vss_hv pc[1]/gpio[33]/tdo ph[10]/gpio[122]/tms pa[6]/gpio[6]/e0uc[6]/eirq[1]/lin4rx/cs1_1 pa[5]/gpio[5]/e0uc[5]/lin4tx pc[2]/gpio[34]/sck_1/can4tx/eirq[5] pc[3]/gpio[35]/cs0_1/ma[0]/eirq[6]/can4rx/can1rx pg[11]/gpio[107]/e0uc[25]/cs0_4 pg[10]/gpio[106]/e0uc[24]/e1uc[31]/sin_4 pe[15]/gpio[79]/cs0_2/e1uc[22] pe[14]/gpio[78]/sck_2/e1uc[21]/eirq[12] pg[15]/gpio[111]/e1uc[1]/lin8rx pg[14]/gpio[110]/e1uc[0]/lin8tx pe[12]/gpio[76]/e1uc[19]/eirq[11]/sin_2\ans[7] 144 lqfp to p v i e w note: availability of port pin alternate functions depends on product selection. because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package pinouts freescale semiconductor 10 2.3 208mapbga pin configuration figure 4. 208 mapbga configuration 1 2345678910111213141516 a pc[8] pc[1 3] ph[1 5] pj[4] ph[8] ph[4] pc[5] pc[0] pi[0] pi[1] pc[2] pi[4] pe[1 5] ph[1 1] nc nc a b pc[9] pb[2] ph[1 3] pc[1 2] pe[6] ph[5] pc[4] ph[9] ph[1 0] pi[2] pc[3] pg[1 1] pg[1 5] pg[1 4] pa [ 1 1] pa [ 1 0] b c pc[14 ] vdd_ hv pb[3] pe[7] ph[7] pe[5] pe[3] vss_ lv pc[1] pi[3] pa[5] pi[5] pe[1 4] pe[1 2] pa [ 9 ] pa [ 8 ] c d ph[14 ] pi[6] pc[1 5] pi[7] ph[6] pe[4] pe[2] vdd _lv vdd _hv nc pa[6] ph[1 2] pg[1 0] pf[1 4] pe[1 3] pa [ 7 ] d e pg[4] pg[5] pg[3] pg[2] pg[1] pg[0] pf[1 5] vdd _hv e f pe[0] pa[2] pa[1] pe[1] ph[0] ph[1] ph[3] ph[2] f g pe[9] pe[8] pe[1 0] pa [ 0 ] v s s _ hv vss_ hv vss_ hv vss_ hv vdd _hv pi[12 ] pi[13 ] mse o g h vss_ hv pe[1 1] vdd _hv nc vss_ hv vss_ hv vss_ hv vss_ hv mdo 3 mdo 2 mdo 0 mdo 1 h j rese t vss_ lv nc nc vss_ hv vss_ hv vss_ hv vss_ hv pi[8] pi[9] pi[10 ] pi[11 ] j k evti nc vdd _bv vdd _lv vss_ hv vss_ hv vss_ hv vss_ hv vdd _hv_ adc 1 pg[1 2] pa [ 3 ] p g [ 1 3] k l pg[9] pg[8] nc evt o pb[1 5] pd[1 5] pd[1 4] pb[1 4] l m pg[7] pg[6] pc[1 0] pc[1 1] pb[1 3] pd[1 3] pd[1 2] pb[1 2] m n pb[1] pf[9] pb[0] vdd _hv pj[0] pa[4] vss_ lv exta l vdd _hv pf[0] pf[4] vss_ hv_ adc 1 pb[1 1] pd[1 0] pd[9] pd[1 1] n p pf[8] pj[3] pc[7] pj[2] pj[1] pa[1 4] vdd _lv xtal pb[1 0] pf[1] pf[5] pd[0] pd[3] vdd _hv_ adc 0 pb[6] pb[7] p r pf[12 ] pc[6] pf[1 0] pf[1 1] vdd _hv pa [ 1 5] pa [ 1 3] pi[14 ] xtal pf[3] pf[7] pd[2] pd[4] pd[7] vss_ hv_ adc 0 pb[5] r t nc nc nc mck o nc pf[1 3] pa [ 1 2] pi[15 ] exta l pf[2] pf[6] pd[1] pd[5] pd[6] pd[8] pb[4] t 1 2345678910111213141516 note: the 208 mapbga is available only as development package for nexus 2+. nc = not connected because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 11 3 electrical characteristics this section contains electrical char acteristics of the device as well as temperature and power considerations. this product contains devices to protect the inputs against damage due to high static voltages. however, it is advisable to tak e precautions to avoid application of any voltage higher than the specified maximum rated voltages. to enhance reliability, unused inputs can be driven to an appropriate logic voltage level (v dd or v ss ). this could be done by the internal pull-up and pull-down, which is provided by the product for most general purpose pins. the parameters listed in the following tables represent th e characteristics of the device and its demands on the system. in the tables where the device lo gic provides signals with their respective timing characteristics, the symbol ?cc? for control ler characteristics is included in the symbol column. in the tables where the external system mu st provide signals with their respective timing characteristics to the device, the sy mbol ?sr? for system requirement is included in the symbol column. caution all of the following figures are indicative and must be confirmed during either sili con validation, silicon characterization or silicon reliability trial. 3.1 parameter classification the electrical parameters shown in this supplement are guaranteed by various methods. to give the customer a better understanding, the classifications listed in table 3 are used and the parameters are ta gged accordingly in the tables where appropriate. note the classification is shown in the column labeled ?c? in the parameter tables where appropriate. 3.2 nvusro register portions of the device configuration, such as high voltage supp ly, oscillator margin, and watch dog enable/disable after reset a re controlled via bit values in the non-volatile user options register (nvusro) register. 3.2.1 nvusro[pad3v5v] field description table 4 shows how nvusro[pad3v5v] controls the device configuration. table 3. paramete r classifications classification ta g tag description p those parameters are guaranteed during production testing on each individual device. c those parameters are achieved by the design characterization by measuring a statistically relevant sample size across process variations. t those parameters are achieved by design characterization on a small sample size from typical devices under typical conditions unless otherwise noted. all values shown in the typical column are within this category. d those parameters are derived mainly from simulations. because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 12 the dc electrical characteristics are dependent on the pad3v5v bit value. 3.2.2 nvusro[oscillator_margin] field description table 5 shows how nvusro[oscillator_margin] controls the device configuration. the main external crystal oscillator consumption is dependent on the oscillator_margin bit value. 3.2.3 nvusro[watchdog_en] field description table 5 shows how nvusro[watchdog_en] cont rols the device configuration. table 4. pad3v5v field description 1 1 see the device reference manual for more information on the nvusro register. value 2 2 '1' is delivery value. it is part of shadow flash, thus programmable by customer. description 0 high voltage supply is 5.0 v 1 high voltage supply is 3.3 v table 5. oscillator_margin field description 1 1 see the device reference manual for more information on the nvusro register. value 2 2 '1' is delivery value. it is part of shadow flash, thus programmable by customer. description 0 low consumption configuration (4 mhz/8 mhz) 1 high margin configuration (4 mhz/16 mhz) table 6. watchdog_en field description 1 1 see the device reference manual for more information on the nvusro register. value 2 2 '1' is delivery value. it is part of shadow flash, thus programmable by customer. description 0 disable after reset 1 enable after reset because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 13 3.3 absolute maximum ratings table 7. absolute maximum ratings symbol parameter conditions value unit min max v ss sr digital ground on vss_hv pins ?0 0 v v dd sr voltage on vdd_hv pins with respect to ground (v ss ) ?-0.36.0 v v ss_lv sr voltage on vss_lv (low voltage digital supply) pins with respect to ground (v ss ) ?v ss -0.1 v ss +0.1 v v dd_bv sr voltage on vdd_bv pin (regulator supply) with respect to ground (v ss ) ?-0.36.0 v relative to v dd -0.3 v dd +0.3 v ss_adc sr voltage on vss_hv_adc 0, vss_hv_adc 1 (adc reference) pin with respect to ground (v ss ) ?v ss -0.1 v ss +0.1 v v dd_adc sr voltage on vss_hv_adc 0, vss_hv_adc 1 (adc reference) with respect to ground (v ss ) ?-0.36.0 v relative to v dd v dd ? 0.3 v dd +0.3 v in sr voltage on any gpio pin with respect to ground (v ss ) ?-0.36.0 v relative to v dd v dd ? 0.3 v dd +0.3 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 14 note stresses exceeding the recommended absolute maximum ratings ma y cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indi cated in the operational sections of this specification are not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. during overload conditions (v in >v dd or v in MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 16 note ram data retention is guaranteed wi?th v dd_lv not below 1.08 v. v dd_adc 5 sr voltage on vss_hv_adc0, vss_hv_adc1 (adc reference) with respect to ground (v ss ) ?4.55.5v voltage drop 2 3.0 5.5 relative to v dd v dd -0.1 v dd +0.1 v in sr voltage on any gpio pin with respect to ground (v ss )?v ss -0.1 - v relative to v dd -v dd +0.1 i injpad sr injected input current on any pin during overload condition ?-55ma i injsum sr absolute sum of all injected input currents during overload condition ? -50 50 tv dd sr v dd slope to ensure correct power up 6 ? ? 0.25 v/s ?3?v/s t a c-grade part sr ambient temperature under bias f cpu < 64 mhz ? 40 85 c t j c-grade part sr junction temperature under bias ? ? 40 110 t a v-grade part sr ambient temperature under bias f cpu < 64 mhz ? 40 105 t j v-grade part sr junction temperature under bias ? ? 40 130 t a m-grade part sr ambient temperature under bias f cpu < 60 mhz ? 40 125 t j m-grade part sr junction temperature under bias ? ? 40 150 1 100 nf capacitance needs to be provided between each v dd /v ss pair 2 full device operation is guaranteed by design when the voltage drops below 4.5v down to 3.6v. however, certain analog electrical characteristics will not be guaranteed to stay wit hin the stated limits. 3 330 nf capacitance needs to be provided between each v dd_lv /v ss_lv supply pair 4 470 nf capacitance needs to be provided between v dd_bv and the nearest v ss_lv (higher value may be needed depending on external regulator characteristics). this decoupling need to be increased as recommended in section 3.5.1, ?external balla st resistor recommendations incase external ballast resistor is planned to be used. 5 100 nf capacitance needs to be provided between v dd_adc /v ss_adc pair 6 guaranteed by device validation table 9. recommended operating conditions (5.0 v) (continued) symbol parameter conditions value unit min max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 17 3.5 thermal characteristics 3.5.1 external ballast r esistor recommendations external ballast resistor on v dd_bv pin helps in reducing the overall power dissipation inside the device. this resistor is required only when maximum power consumption exceeds the limit imposed by package thermal characteristics. as stated in table 10 lqfp thermal characteristics, cons idering thermal resistance of lqfp 144 as 48.3 c/w , at ambient t a = 125 c, the junction temp t j will cross 150 c if total power dissipation > (1 50 - 125)/48.3 = 517 mw. therefore, total device current i ddmax at 125 c/5.5v must not exceed 94.1 ma (i.e. pd/vdd). assuming an average i dd (v dd_hv ) of 15-20 ma consumption typically during device run mode, the lv domain consumption i dd (v dd_bv ) is thus limited to i ddmax - i dd (v dd_hv ) i.e. 80 ma. therefore, respecting the maximum power allowed as explained in section 3.5.2, ?package thermal characteristics , it is recommended to use this resistor only in the 125 c/5.5v operating corner as per the following guidelines: ?if i dd (v dd_bv ) < 80 ma, then no resistor is required. ?if 80 ma < i dd (v dd_bv ) < 90 ma, then 4 ohm resistor can be used along with 14.7 f decoupling. ?if i dd (v dd_bv ) > 90 ma, then 8 ohm resistor can be used along with 33 f decoupling. using resistance in the range of 4-8 ohm, the gain will be around 10-20% of total consumption on v dd_bv . for example, if 8 ohm resistor is used, then power consumption when i dd (v dd_bv ) is 110 ma is equivalent to power consumption when i dd (v dd_bv ) is 90 ma (approximately) when resistor not used. 3.5.2 package thermal characteristics table 10. lqfp thermal characteristics 1 1 thermal characteristics are targets based on simulation that are subject to change per device characterization. symbol c parameter conditions 2 2 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c. pin count value 3 3 all values need to be confirmed during device validation. unit min typ max r ja cc d thermal resistance, junction-to- ambient natural convection 4 4 junction-to-ambient thermal resistance determined per je dec jesd51-3 and jesd51-6. thermal test board meets jedec specification for this package. when greek lett ers are not available, the symbols are typed as r thja and r thjma . single-layer board?1s 100 ? ? 64 c/w 144 ? ? 64 176 ? ? 64 four-layer board?2s2p 100 ? ? 49.7 144 ? ? 48.3 176 ? ? 47.3 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 18 3.5.3 power considerations the average chip-junction temperature, t j , in degrees celsius, may be calculated using equation 1 : t j = t a + (p d x r ja ) eqn. 1 where: t a is the ambient temperature in c. r ja is the package junction-to-ambie nt thermal resistance, in c/w. p d is the sum of p int and p i/o (p d = p int + p i/o ). p int is the product of i dd and v dd , expressed in watts. this is the chip internal power. p i/o represents the power dissipation on input and output pins; user determined. most of the time for the applications, p i/o < p int and may be neglected. on the other hand, p i/o may be significant, if the device is configured to continuously drive external modules and/or memories. an approximate relationship between p d and t j (if p i/o is neglected) is given by: p d = k / (t j + 273 c) eqn. 2 therefore, solving equations 1 and 2 : k = p d x (t a + 273 c) + r ja x p d 2 eqn. 3 where: k is a constant for the particular part, which may be determined from equation 3 by measuring p d (at equilibrium) for a known t a. using this value of k, the values of p d and t j may be obtained by solving equations 1 and 2 iteratively for any value of t a . 3.6 i/o pad electrical characteristics 3.6.1 i/o pad types the device provides four main i/o pad types depe nding on the associated alternate functions: ? slow pads - are the most common pads, providing a good compromise between transition time and low electromagnetic emission. ? medium pads - provide transition fast enough for the serial communication channels with controlled current to reduce electromagnetic emission. table 11. 208 mapbga thermal characteristics 1 1 thermal characteristics are targets based on simulation t hat are subject to change per device characterization. symbol c parameter conditions value unit r ja cc ? thermal resistance, junction-to-am bient natural convection 2 2 junction-to-ambient thermal resistance determined per jedec jesd51-3 and jesd51-6. thermal test board meets jedec specification for this package. when greek letters are not available, the symbols are typed as r thja and r thjma . single-layer board?1s tbd c/w four-layer board?2s2p because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 19 ? fast pads - provide maximum speed. these are used for improved nexus debugging capability. ? input only pads - are associ ated with adc channels and 32 khz low power external crys tal oscillator providing low input leakage. medium and fast pads can use slow configuration to reduce elect romagnetic emission, at the cost of reducing ac performance. 3.6.2 i/o input dc characteristics table 12 provides input dc electrical ch aracteristics as described in figure 5 . figure 5. i/o input dc electrical characteristics definition table 12. i/o input dc electrical characteristics symbol c parameter conditions 1 value 2 unit min typ max v ih sr p input high level cmos (schmitt trigger) ?0.65v dd ?v dd +0.4 v v il sr p input low level cmos (schmitt trigger) ? ? 0.4 ? 0.35v dd v hys cc c input hysteresis cmos (schmitt trigger) ?0.1v dd ?? v il v in v ih pdix = ?1 v dd v hys (gpdi register of siul) pdix = ?0? because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 20 i lkg cc p digital input leakage no injection on adjacent pin t a = ? 40 c ? 2 ? na pt a = 25 c ? 2 ? dt a = 105 c ? 12 500 pt a = 125 c ? 70 1000 w fi sr p width of input pulse surely filtered by analog filter 3 ???4 0 n s w nfi sr p width of input pulse surely not filtered by analog filter 3 ? 1000 ? ? ns 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified 2 all values need to be confirmed during device validation. 3 analog filters are available on all wakeup lines. table 12. i/o input dc electrical characteristics (continued) symbol c parameter conditions 1 value 2 unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 21 3.6.3 i/o output dc characteristics the following tables provide dc char acteristics for bidirectional pads: ? table 13 provides weak pull figures. both pull- up and pull-down resistances are supported. ? table 15 provides output driver char acteristics for i/o pads wh en in slow configuration. ? table 16 provides output driver char acteristics for i/o pads when in medium configuration. ? table 14 provides output driver char acteristics for i/o pads wh en in fast configuration. table 13. i/o pull-up/pull-down dc electrical characteristics symbol c parameter conditions 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified. value unit min typ max |i wpu | cc p weak pull-up current absolute value v in = v il , v dd = 5.0 v 10% pad3v5v = 0 10 ? 150 a cpad3v5v = 1 2 2 the configuration pad3v5 = 1 when v dd = 5 v is only a transient configuration during power-up. all pads but reset and nexus output (mdox, evto, mcko) are co nfigured in input or in high impedance state. 10 ? 250 pv in = v il , v dd = 3.3 v 10% pad3v5v = 1 10 ? 150 |i wpd | cc p weak pull-down current absolute value v in = v ih , v dd = 5.0 v 10% pad3v5v = 0 10 ? 150 a cpad3v5v = 1 10 ? 250 pv in = v ih , v dd = 3.3 v 10% pad3v5v = 1 10 ? 150 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 22 table 14. fast configuration output buffer electrical characteristics symbol c parameter conditions 1 value unit min typ max v oh cc p output high level fast configurati on push pull i oh = ? 14ma, v dd = 5.0 v 10%, pad3v5v = 0 (recomme nded) 0.8v dd ?? v ci oh = ? 7ma, v dd = 5.0 v 10%, pad3v5v = 1 2 0.8v dd ?? ci oh = ? 11ma, v dd = 3.3 v 10%, pad3v5v = 1 (recomme nded) v dd ? 0.8 ? ? v ol cc p output low level fast configurati on push pull i ol = 14ma, v dd = 5.0 v 10%, pad3v5v = 0 (recomme nded) ? ? 0.1v dd v ci ol = 7ma, v dd = 5.0 v 10%, pad3v5v = 1 2 ? ? 0.1v dd ci ol = 11ma, v dd = 3.3 v 10%, pad3v5v = 1 (recomme nded) ??0.5 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 23 3.6.4 output pin transition times 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified 2 the configuration pad3v5 = 1 when v dd = 5 v is only a transient configuration during power-up. all pads but reset and nexus output (mdox, evto, mcko) are co nfigured in input or in high impedance state. table 15. output pin transition times symbol c parameter conditions 1 value 2 unit min typ max t tr cc d output transition time output pin 3 slow configurati on c l = 25 pf v dd = 5.0 v 10%, pad3v5v = 0 ? ? 50 ns tc l = 50 pf ? ? 100 dc l = 100 pf ? ? 125 dc l = 25 pf v dd = 3.3 v 10%, pad3v5v = 1 ??50 tc l = 50 pf ? ? 100 dc l = 100 pf ? ? 125 t tr cc d output transition time output pin 3 medium configurati on c l = 25 pf v dd = 5.0 v 10%, pad3v5v = 0 siul.pcr x.src = 1 ? ? 10 ns tc l = 50 pf ??20 dc l = 100 pf ??40 dc l = 25 pf v dd = 3.3 v 10%, pad3v5v = 1 siul.pcr x.src = 1 ??12 tc l = 50 pf ??25 dc l = 100 pf ??40 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 24 3.6.5 i/o pad current specification the i/o pads are distributed across the i/o supply segm ent. each i/o supply segm ent is associated to a v dd /v ss supply pair as described in table 16 . table 17 provides i/o consumption figures. in order to ensure device reliability, the average current of the i/o on a si ngle segment should remain below the i av g s e g maximum value. in order to ensure device functionality, the sum of the dynamic and static current of the i/o on a single segment should remain below the i dynseg maximum value. t tr cc d output transition time output pin 3 fast configurati on c l = 25 pf v dd = 5.0 v 10%, pad3v5v = 0 ?? 4 ns c l = 50 pf ?? 6 c l = 100 pf ??12 c l = 25 pf v dd = 3.3 v 10%, pad3v5v = 1 ?? 4 c l = 50 pf ?? 7 c l = 100 pf ??12 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified 2 all values need to be confirmed during device validation. 3 c l includes device and package capacitances (c pkg < 5 pf). table 16. i/o supply segments package supply segment 12345678 208 mapbga 1 1 208 mapbga available only as de velopment package for nexus2+ equivalent to 176 lqfp segment pad distribution mcko mdon /mseo 176 lqfp pin7 ? pin27 pin28 ? pin57 pin59 ? pin85 pin86 ? pin123 pin124 ? pin150 pin151 ? pin6 144 lqfp pin20 ? pin49 pin51 ? pin99 pin100 ? pin122 pin 123 ? pin19 ? ? ? ? 100 lqfp pin16 ? pin35 pin37 ? pin69 pin70 ? pin83 pin84 ? pin15 ? ? ? ? table 15. output pin transition times (continued) symbol c parameter conditions 1 value 2 unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 25 table 17. i/o consumption symbol c parameter conditions 1 value 2 unit min typ max i dynseg sr d sum of all the dynamic and static i/o current within a supply segment v dd = 5.0 v 10%, pad3v5v = 0 ??110ma v dd = 3.3 v 10%, pad3v5v = 1 ??65 i swtslw ,3 cc d dynamic i/o current for slow configurati on c l = 25 pf v dd = 5.0 v 10%, pad3v5v = 0 ??20ma v dd = 3.3 v 10%, pad3v5v = 1 ??16 i swtmed 3 cc d dynamic i/o current for medium configurati on c l = 25 pf v dd = 5.0 v 10%, pad3v5v = 0 ??29ma v dd = 3.3 v 10%, pad3v5v = 1 ??17 i swtfst 3 cc d dynamic i/o current for fast configurati on c l = 25 pf v dd = 5.0 v 10%, pad3v5v = 0 ??110ma v dd = 3.3 v 10%, pad3v5v = 1 ??50 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 26 i rmsslw cc d root medium square i/o current for slow configurati on c l = 25 pf, 2 mhz v dd = 5.0 v 10%, pad3v5v = 0 ??2.3ma c l = 25 pf, 4 mhz ??3.2 c l = 100 pf, 2 mhz ??6.6 c l = 25 pf, 2 mhz v dd = 3.3 v 10%, pad3v5v = 1 ??1.6 c l = 25 pf, 4 mhz ??2.3 c l = 100 pf, 2 mhz ??4.7 i rmsmed cc d root medium square i/o current for medium configurati on c l = 25 pf, 13 mhz v dd = 5.0 v 10%, pad3v5v = 0 ??6.6ma c l = 25 pf, 40 mhz ??13.4 c l = 100 pf, 13 mhz ??18.3 c l = 25 pf, 13 mhz v dd = 3.3 v 10%, pad3v5v = 1 ?? 5 c l = 25 pf, 40 mhz ??8.5 c l = 100 pf, 13 mhz ??11 table 17. i/o consumption (continued) symbol c parameter conditions 1 value 2 unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 27 3.7 nrstin electrical characteristics the device implements a dedicat ed bidirectional reset pin. i rmsfst cc d root medium square i/o current for fast configurati on c l = 25 pf, 40 mhz v dd = 5.0 v 10%, pad3v5v = 0 ??22ma c l = 25 pf, 64 mhz ??33 c l = 100 pf, 40 mhz ??56 c l = 25 pf, 40 mhz v dd = 3.3 v 10 %, pad3v5v = 1 ??14 c l = 25 pf, 64 mhz ??20 c l = 100 pf, 40 mhz ??35 i avgseg sr d sum of all the static i/o current within a supply segment v dd = 5.0 v 10%, pad3v5v = 0 ??70ma v dd = 3.3 v 10%, pad3v5v = 1 ??65 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to125 c, unless otherwise specified 2 all values need to be confirmed during device validation. 3 stated maximum values represent peak consumption that lasts only a few ns during i/o transition. table 17. i/o consumption (continued) symbol c parameter conditions 1 value 2 unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 28 figure 6. start-up reset requirements figure 7. noise filtering on reset signal v il v dd device reset forced by nrstin v ddmin nrstin v ih device start-up phase v rstin v il v ih v dd filtered by hysteresis filtered by lowpass filter w frst w nfrst hw_rst ?1? ?0? filtered by lowpass filter w frst unknown reset state device under hardware reset because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 29 table 18. reset electrical characteristics symbol c parameter conditions 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified value 2 2 all values need to be confirmed during device validation. unit min typ max v ih sr p input high level cmos (schmitt trigger) ? 0.65v dd ?v dd +0.4 v v il sr p input low level cmos (schmitt trigger) ? ? 0.4 ? 0.35v dd v v hys cc c input hysteresis cmos (schmitt trigger) ?0.1v dd ??v v ol cc p output low level push pull, i ol = 2ma, v dd = 5.0 v 10%, pad3v5v = 0 (recommended) ? ? 0.1v dd v push pull, i ol = 1ma, v dd = 5.0 v 10%, pad3v5v = 1 3 3 this is a transient configuration during power-up, up to the end of reset phase2 (refer to rgm module section of the device reference manual). ? ? 0.1v dd push pull, i ol = 1ma, v dd = 3.3 v 10%, pad3v5v = 1 (recommended) ??0.5 t tr cc d output transition time output pin 4 medium configuration 4 c l includes device and package capacitance (c pkg <5pf). c l = 25pf, v dd = 5.0 v 10%, pad3v5v = 0 ? ? 10 ns c l = 50pf, v dd = 5.0 v 10%, pad3v5v = 0 ??20 c l = 100pf, v dd = 5.0 v 10%, pad3v5v = 0 ??40 c l = 25pf, v dd = 3.3 v 10%, pad3v5v = 1 ??12 c l = 50pf, v dd = 3.3 v 10%, pad3v5v = 1 ??25 c l = 100pf, v dd = 3.3 v 10%, pad3v5v = 1 ??40 w frst sr p nrstin input filtered pulse ???40ns w nfrst sr p nrstin input not filtered pulse ? 1000 ? ? ns |i wpu | cc p weak pull-up current absolute value v dd = 3.3 v 10%, pad3v5v = 1 10 ? 150 a v dd = 5.0 v 10%, pad3v5v = 0 10 ? 150 v dd = 5.0 v 10%, pad3v5v = 1 5 5 the configuration pad3v5 = 1 when v dd = 5 v is only transient configuration du ring power-up. all pads but reset and nexus output (mdox, evto, mcko) are conf igured in input or in high impedance state. 10 ? 250 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 30 3.8 power management electrical characteristics 3.8.1 voltage regulator electrical characteristics the device implements an internal voltage regulator to generate the low voltage core supply v dd_lv from the high voltage ballast supply v dd_bv . the regulator itself is supplied by the common i/o supply v dd . the following supplies are involved: ? hv: high voltage external power supply for voltage regulator module. this must be provided externally through v dd power pin. ? bv: high voltage external power supply for internal ballast module. this must be provided externally through v dd_bv power pin. voltage values should be aligned with v dd . ? lv: low voltage internal power supply for core, fmpll and flash digital logic. this is generated by the internal voltage regulator but provided outside to connect stability capacito r. it is further split into four main domains to ensure noise isolation between critical lv modules within the device: ? lv_cor: low voltage supply for the core. it is also `used to provide supply for fmpll through double bonding. ? lv_cfla: low voltage supply for code flash module. it is supplied with dedicated ballast and shorted to lv_cor through double bonding. ? lv_dfla: low voltage supply for data flash module. it is supplied with dedicated ballast and shorted to lv_cor through double bonding. ? lv_pll: low voltage supply for fmpll. it is shorted to lv_cor through double bonding. figure 8. voltage regulator capacitance connection the internal voltage regulator requires external capacitance (c regn ) to be connected to the device in order to provide a stable low voltage digital supply to the device. ca pacitances should be placed on the board as near as possible to the associated pins . care should also be taken to limit the seri al inductance of the board to less than 5 nh. c reg1 (lv_cor/lv_dfla) device v ss_lv v dd_bv v dd_lv c dec1 (ballast decoupling) v ss_lv v dd_lv v dd v ss_lv v dd_lv c reg2 (lv_cor/lv_cfla) c reg3 (lv_cor/lv_pll) c dec2 (supply/io decoupling) device v dd_bv i v dd_lvn v ref v dd voltage regulator v ss v ss_lvn gnd gnd gnd gnd because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 31 each decoupling capacitor must be placed between each of the three v dd_lv /v ss_lv supply pairs to ensure stable voltage (see section 3.4, ?recommen ded operating conditions ). table 19. voltage regulator electrical characteristics symbol c parameter conditions 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified value 2 2 all values need to be confirmed during device validation. unit min typ max c regn sr ? internal voltage regulator external capacitance ? 200 ? 330 nf r reg sr ? stability capacitor equivalent serial resistance ???0.2w c dec1 sr ? decoupling capacitance 3,4 ballast v dd_bv /v ss_lv pair 400 470 5 ?nf c dec2 sr ? decoupling capacitance regulator supply v dd /v ss pair 10 100 ? nf v mreg cc p main regulator output voltage before trimming ? 1.32 ? v after trimming ? 1.28 ? i mreg sr ? main regulator current provided to v dd_lv domain ??? 150 ma i mregint cc d main regulator module current consumption i mreg = 200 ma ? ? 2 ma i mreg = 0 ma ? ? 1 v lpreg cc p low power regulator output voltage after trimming ? 1.23 ? v i lpreg sr ? low power regulator current provided to v dd_lv domain ? ?? 15 ma i lpregint cc d low power regulator module current consumption i lpreg = 15 ma; t a = 55 c ?? 600 a ? i lpreg = 0 ma; t a = 55 c ? 5 tbd v ulpreg cc p ultra low power regulator output voltage post trimming ? 1.23 ? v i ulpreg sr ? ultra low power regulator current provided to v dd_lv domain ??? 5 ma i ulpregint cc d ultra low power regulator module current consumption i ulpreg = 5 ma; t a = 55 c ?? 100 a i ulpreg = 0 ma; t a = 55 c ? 2 tbd i vregref cc d main lvds and reference current consumption (low power and main regulator switched off) t a = 55 c ? 17 ? a i vredlvd12 cc d main lvd current consumption (switch-off during standby) t a = 55 c ? 2 tbd a i dd_bv cc d in-rush current on v dd_bv during power-up ?? ? 400 6 ma because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 32 3 this capacitance value is driven by the constraint s of the external voltage regulator supplying the v dd_bv voltage. a typical value is in the range of 470 nf. 4 in case external ballast resistor is planned to be used , then to avoid a lvd reset during standby mode exit, the following configuration need to be respected. - for 8 ohm ballast resistor, decoupling cap of 33 f is required. - for 4 ohm ballast resistor, deco upling cap of 14.7f is required. these values are only after preliminary validation and are subject to change. 5 external regulator and capacitance circuitry must be capable of providing i dd_bv while maintaining supply v dd_bv in operating range. 6 in-rush current is seen only for short time during power-up and on standby exit (max 20s, depending on external capacitances to be load) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 33 3.8.2 voltage monitor electrical characteristics the device implements a power-on reset module to ensure correct power-up initialization, as well as four low voltage detectors to monitor the v dd and the v dd_lv voltage while device is supplied: ? por monitors v dd during the power-up phase to ensure devi ce is maintained in a safe reset state ? lvdhv3 monitors v dd to ensure device reset below minimum functional supply ? lvdhv3b monitors v dd_bv to ensure device reset below minimum functional supply ? lvdhv5 monitors v dd when application uses device in the 5.0 v 10% range ? lvdlvcor monitors power domain no. 1 ? lvdlvbkp monitors power domain no. 0 note when enabled, power domain no. 2 is monitored through lvd_digbkp. figure 9. low voltage monitor vs reset v dd v lvdhvxh reset v lvdhvxl because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 34 table 20. low voltage monitor electrical characteristics symbol c parameter condition s 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified value 2 unit symbol v porup sr p supply for functional por module t a = 25 c, after trimming 1.0 ? 5.5 v v porup v porh cc p power-on reset threshold 1.5 ? 2.6 v porh v lv d h v3 h cc t lvdhv3 low voltage detector high threshold ??2.95 v lv d h v 3 h v lvd h v 3 l cc p lvdhv3 low voltage detector low threshold 2.7 ? 2.9 v lv d h v3 l v lv d h v3 b h cc p lvdhv3b low voltage detector high threshold ??2.95 v lvdhv3bh v lvdhv3bl cc p lvdhv3b l low voltage detector low threshold 2.7 ? 2.9 v lvdhv3bl v lv d h v5 h cc t lvdhv5 low voltage detector high threshold ??4.5 v lv d h v 5 h v lvd h v 5 l cc p lvdhv5 low voltage detector low threshold 3.8 ? 4.4 v lv d h v5 l v lv d lv c o r l cc p lvdlvco r low voltage detector low threshold 1.07 ? 1.11 v lv d lvc o r l because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 35 3.9 low voltage domain power consumption table 21 provides dc electrical characteristic s for significant application modes. th ese values are indi cative values; actual consumption depends on the application. 2 all values need to be confirmed during device validation. table 21. low voltage power domain electrical characteristics symbol c parameter conditions 1 value unit min typ max i ddmax 2 cc d run mode maximum average current ? ? 115 140 3 ma i ddrun 4 cc t run mode typical average current 5 ? ? 80 100 ma p? ? t b d t b d i ddhalt cc p halt mode current 6 ??8t b dm a i ddstop cc p stop mode current 7 slow internal rc oscillator (128 khz) running t a =25 c ? 350 900 8 a dt a =55 c ? 750 ? dt a =85 c ?2?ma dt a = 105 c ?4? pt a = 125 c ?9tbd 8 i ddstdby2 cc p standby 2 mode current 9 slow internal rc oscillator (128 khz) running t a =25 c ? 30 100 a dt a =55 c ?tbd? dt a =85 c ?? dt a = 105 c ?? pt a = 125 c ?t b d because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 36 i ddstdby1 cc t standby 1 mode current 10 slow internal rc oscillator (128 khz) running t a =25 c ?2060a dt a =55 c ?tbd? dt a =85 c ?? dt a = 105 c ?? dt a = 125 c ? 280 tbd 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified 2 running consumption is given on voltage regulator supply (v ddreg ). it does not include consumption linked to i/os toggling. this value is highly dependent on the application. the gi ven value is thought to be a worst case value with all peripherals running, and code fetched from code flas h while modify operation on-goin g on data flash. it is to be noticed that this value can be signi ficantly reduced by application: swit ch-off not used peripherals (default), reduce peripheral frequency through internal prescaler, fetch from ram most used functions, use low power mode when possible. 3 higher current may be sinked by device during power-up and standby exit. please refer to in rush current on ta bl e 1 9 . 4 run current measured with typical application with accesses on both flash and ram. 5 only for the ?p? classification: code fetched from ram: serial ips can and lin in loop back mode, dspi as master, pll as system clock (4 x multiplier) peripherals on (emi os/ctu/adc) and running at max frequency, periodic sw/wdg timer reset enabled. 6 data flash power down. code flash in low power. rc-osc128khz & rc-osc 16mhz on. 10mhz xtal clock. flexcan: instances: 0, 1, 2 on (clocked but not reception or transmission), instances: 4, 5, 6 clock gated. linflex: instances: 0, 1, 2 on (clocked but not reception or trans mission), instance: 3 clock gated. emios: instance: 0 on (16 channels on pa[0]-pa[11] and pc[ 12]-pc[15]) with pwm 20khz, instance: 1 clock gated. dspi: instance: 0 (clocked but no communication). rtc/api on.pit on. stm on. adc on but not conversion except 2 analogue watchdog 7 only for the ?p? classification: no clock, rc 16mhz off, rc128khz on, pll off, hpvreg off, ulpvreg/lpvreg on. all possible peripherals off and clock gated. flash in power down mode. 8 when going from run to stop mode and the core consumpt ion is > 6 ma , it is normal operation for the main regulator module to be kept on by the on-chip current monito ring circuit. this is most likely to occur with junction temperatures exceeding 125 c and under these circumstances , it is possible for the current to initially exceed the maximum stop specification by up to 2 ma. after entering stop, the application junction temperature will reduce to the ambient level and the main regulator will be automati cally switched off when the load current is below 6 ma. 9 only for the ?p? classification: ulpreg on, hp/lpvreg off, 32 kb ram on, device configured for minimum consumption, all possible modules switched-off. 10 ulpreg on, hp/lpvreg off, 8kb ram on, device configur ed for minimum consumption, all possible modules switched-off. table 21. low voltage power domain electrical characteristics (continued) symbol c parameter conditions 1 value unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 37 3.10 flash memory electrical characteristics 3.10.1 program/erase characteristics table 22 shows the program and erase characteristics. table 22. program and erase specifications symbol c parameter value unit min typ 1 1 typical program and erase times assume nominal supply values and operation at 25 c. all times are subject to change pending device characterization. initial max 2 2 initial factory condition: < 100 program/erase cycles, 25 c, typical supply voltage. max 3 3 the maximum program and erase times occur after the spec ified number of program/erase cycles. these maximum values are characterized but not guaranteed. t dwprogram cc c double word (64 bits) program time 4 4 actual hardware programming times. this does not include software overhead. ?22tbd500s t 16kpperase 16 kb block pre-progra m and erase time ? 300 500 5000 ms t 32kpperase 32 kb block pre-progra m and erase time ? 400 600 5000 ms t 128kpperas e 128 kb block pre-progra m and erase time ? 800 1300 7500 ms because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 38 ecc circuitry provides correction of single bit faults and is us ed to improve further automotive reliability results. some unit s will experience single bit corrections throughout the life of the product with no impact to product reliability. 3.10.2 flash power supply dc characteristics table 25 shows the power supply dc char acteristics on external supply. table 23. flash module life symbol c parameter conditions value unit min typ p/e cc c number of program/erase cycles per block for 16 kbyte blocks over the operating temperature range (t j ) ? 100,000 ? cycles p/e cc c number of program/erase cycles per block for 32 kbyte blocks over the operating temperature range (t j ) ? 10,000 100,000 1 1 to be confirmed cycles p/e cc c number of program/erase cycles per block for 128 kbyte blocks over the operating temperature range (t j ) ? 1,000 100,000 1 cycles retention cc c minimum data retention at 85 c average ambient temperature 2 2 ambient temperature averaged over duration of applic ation, not to exceed recommended product operating temperature range. blocks with 0?1,000 p/e cycles 20 ? years blocks with 10,000 p/e cycles 10 ? years blocks with 100,000 p/e cycles 5?years table 24. flash read access timing symbol c parameter conditions 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified max unit f read cc p maximum frequency for flash reading 2 wait states 64 mhz c 1 wait state 40 c 0 wait states 20 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 39 table 25. flash power supply dc electrical characteristics symbol parameter conditions 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = -40 / 125 c, unless otherwise specified value 2 2 all values need to be confirmed during device validation. unit min typ max i cfread 3 3 data based on characterization re sults, not tested in production cc sum of the current consumptio n on v ddhv and v ddbv on read access flash module read f cpu = 64 mhz 4 4 f cpu 64 mhz can be achieved only at up to 105 c code flash 33 ma i dfread 3 data flash 33 i cfmod 3 cc sum of the current consumptio n on v ddhv and v ddbv on matrix modificatio n (program/er ase) program/ erase on-going while reading flash registers f cpu = 64 mhz 4 code flash 52 ma i dfmod 3 data flash 33 i cflpw 3 cc sum of the current consumptio n on v ddhv and v ddbv during flash low power mode code flash 1.1 ma i dflpw 3 data flash 900 a i cfpwd 3 cc sum of the current consumptio n on v ddhv and v ddbv during flash power down mode code flash 150 a i dfpwd 3 data flash 150 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 40 3.10.3 start-up/switch-off timings 3.11 electromagnetic compatib ility (emc) characteristics susceptibility tests are performed on a sample basis during produ ct characterization. 3.11.1 designing hardened software to avoid noise problems emc characterization and optimiza tion are performed at component level with a typical application environment and simplified mcu software. it should be noted that good emc performance is highly dependent on the user application and the software in particular. therefore it is recommended that the user apply emc software optimization and prequalification tests in relation with the emc level requested for the application. ? software recommendations ? the software flowchart must include the ma nagement of runaway conditions such as: ? corrupted program counter table 26. start-up time/switch-off time symbol c parameter conditions 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified value unit min typ max t flarstexi t cc t delay for flash module to exit reset mode ? ? ? 125 s t flalpexit cc t delay for flash module to exit low-power mode ???0.5 t flapdexit cc t delay for flash module to exit power-dow n mode ???30 t flalpentr y cc t delay for flash module to enter low-power mode ???0.5 t flapdent ry cc t delay for flash mod- ule to enter power-dow n mode ???1.5 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 41 ? unexpected reset ? critical data corruption (control registers...) ? prequalification trials ? most of the common failures (unexpected re set and program counter corruption) can be reproduced by manually forcing a low state on the reset pin or the oscillator pins for 1 second. to complete these trials, esd stress can be applied directly on the device. when unexpected behavior is detected, the software can be hardened to prev ent unrecoverable errors occurring. 3.11.2 electromagnetic interference (emi) the product is monitored in terms of emission based on a typical application. this emission test conforms to the iec61967-1 standard, which specifies the general conditions for emi measurements. 3.11.3 absolute maximum ratings (electrical sensitivity) based on two different tests (esd and lu) using specific measurement me thods, the product is stressed in order to determine its performance in terms of electrical sensitivity. table 27. emi radiated emission measurement 1,2 1 emi testing and i/o port waveforms per iec 61967-1, -2, -4 2 for information on conducted emission and susceptibility measurement (norm iec 61967-4), please contact your local marketing representative. symbol c paramete r conditions value unit min typ max ? sr ? scan range ? 0.150 1000 mhz f cpu sr ? operating frequency ??64?mhz v dd_lv sr ? lv operating voltages ? ? 1.28 ? v s emi cc t peak level v dd = 5v, t a =25 c, lqfp144 package test conformin g to iec 61967-2, f osc = 8 mhz/f cpu = 64 mhz no pll frequency modulatio n ? ? 18 dbv 2% pll frequency modulatio n ??14 3 3 all values need to be confirmed during device validation dbv because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 42 3.11.3.1 electrostatic discharge (esd) electrostatic discharges (a positive then a negative pulse separated by 1 second) ar e applied to the pins of each sample accord ing to each pin combination. the sample size depends on the number of supply pins in the device (3 parts (n+1) supply pin). this test conforms to the aec- q100-002/-003/-011 standard. 3.11.3.2 static latch-up (lu) two complementary static tests are required on six parts to assess the latch-up performance: ? a supply overvoltage is appl ied to each power supply pin. ? a current injection is applied to each input, output and configurable i/o pin. these tests are compliant with the eia/jesd 78 ic latch-up standard. 3.12 fast external crystal oscill ator (4 to 16 mhz) electrical characteristics the device provides an oscillator/resonator driver. figure describes a simple model of the internal oscillator driver and provides an example of a connection for an oscillator or a resonator. table 30 provides the parameter description of 4 mhz to 16 mhz crystals used for the design simulations. table 28. esd absolute maximum ratings 1,2 1 all esd testing is in conformity with cdf-aec-q100 stre ss test qualification for au tomotive grade integrated circuits. 2 a device will be defined as a failure if after exposure to esd pulses the device no longer meets the device specification requirements. complete dc parametric and functional testing shall be performed per applicable device specification at room temperature followed by ho t temperature, unless specified otherwise in the device specification. symbol ratings conditions class max value 3 3 data based on characterization results, not tested in production unit v esd(hbm) electrostatic discharge voltage (human body model) t a = 25 c conforming to aec-q100-002 h1c 2000 v v esd(mm) electrostatic discharge voltage (machine model) t a = 25 c conforming to aec-q100-003 m2 200 v esd(cdm) electrostatic discharge voltage (charged device model) t a = 25 c conforming to aec-q100-011 c3a 500 750 (corners) table 29. latch-up results symbol parameter conditions class lu static latch-up class t a = 125 c conforming to jesd 78 ii level a because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 43 figure 10. crystal oscillator and resonator connection scheme note xtal/extal must not be directly used to drive external circuits. table 30. crystal description nominal frequency (mhz) ndk crystal reference crystal equivalent series resistance esr crystal motional capacitance (c m ) ff crystal motional inductance (l m ) mh load on xtalin/xtalout c1 = c2 (pf) 1 1 the values specified for c1 and c2 are the same as used in simulations. it should be ensured that the testing includes all the parasitics (from the board, probe, crystal, et c.) as the ac / transient behavior depends upon them. shunt capacitance between xtalout and xtalin c0 2 (pf) 2 the value of c0 specified here includes 2 pf additional capacitance for parasitics (to be seen with bond-pads, package, etc.). 4 nx8045gb 300 2.68 591.0 21 2.93 8 nx5032ga 300 2.46 160.7 17 3.01 10 150 2.93 86.6 15 2.91 12 120 3.11 56.5 15 2.93 16 120 3.90 25.3 10 3.00 c2 c1 crystal xtal extal r p resonator xtal extal device device device xtal extal i r v dd because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 44 figure 11. fast external crystal oscillator (4 to 16 mhz) electrical characteristics table 31. fast external crystal oscillator (4 to 16 mhz) electrical characteristics symbol c parameter conditions 1 value 2 unit min typ max f fxosc sr ? fast external crystal oscillator frequency ? 4.0 ? 16.0 mhz g mfxosc cc c fast external crystal oscillator transconductance v dd = 3.3 v 10%, pad3v5v = 1 oscillator_margin = 0 2.2 ? 8.2 ma/v cc p v dd = 5.0 v 10%, pad3v5v = 0 oscillator_margin = 0 2.0 ? 7.4 cc c v dd = 3.3 v 10%, pad3v5v = 1 oscillator_margin = 1 2.7 ? 9.7 cc c v dd = 5.0 v 10%, pad3v5v = 0 oscillator_margin = 1 2.5 ? 9.2 v fxosc cc t oscillation amplitude at extal f osc = 4 mhz, oscillator_margin = 0 1.3 ? ? v f osc = 16 mhz, oscillator_margin = 1 1.3 ? ? v fxoscop cc p oscillation operating point ? ? 0.95 v i fxosc ,3 cc t fast external crystal oscillator consumption ??23ma v mxoscop t mxoscsu v xtal v mxosc valid internal clock 90% 10% 1/f mxosc s_mtrans bit (me_gs register) 1 0 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 45 3.13 slow external crystal oscillator (32 khz) electrical characteristics the device provides a low power oscillator/resonator driver. figure 12. crystal oscillator and resonator connection scheme note osc32k_xtal/osc32k_extal must not be dir ectly used to drive external circuits. t fxoscsu cc t fast external crystal oscillator start-up time f osc = 4 mhz, oscillator_margin = 0 ?? 6ms f osc = 16 mhz, oscillator_margin = 1 ??1.8 v ih sr p input high level cmos (schmitt trigger) oscillator bypass mode 0.65v dd ?v dd +0.4 v v il sr p input low level cmos (schmitt trigger) oscillator bypass mode ? 0.4 ? 0.35v dd v 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified 2 all values need to be confirmed during device validation. 3 stated values take into account only analog module consumption but not the digital contributor (clock tree and enabled peripherals) table 31. fast external crystal oscillator (4 to 16 mhz) electrical characteristics (continued) symbol c parameter conditions 1 value 2 unit min typ max osc32k_xtal osc32k_extal device c2 c1 crystal osc32k_xtal osc32k_extal r p resonator device because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 46 l figure 13. equivalent circuit of a quartz crystal table 32. crystal motional characteristics 1 1 the crystal used is epson toyocom mc306. symbol parameter conditions value unit min typ max l m motional inductance ? ? 11.796 ? kh c m motional capacitance ? ? 2 ? ff c1/c2 load capacitance at osc32k_xtal and osc32k_extal with respect to ground 2 2 this is the recommended range of load capacitance at osc32k_xtal and osc32k_extal with respect to ground. it includes all the parasitics due to board traces, crystal and package. ?1 8?2 8 p f r m 3 3 maximum esr (r m ) of the crystal is 50 k motional resistance ac coupled @ c0 = 2.85 pf 4 4 c0 includes a parasitic capacitance of 2.0 pf between osc32k_xtal and osc32k_extal pins ??65kw ac coupled @ c0 = 4.9 pf 4 ??50 ac coupled @ c0 = 7.0 pf 4 ??35 ac coupled @ c0 = 9.0 pf 4 ??30 c0 c2 c1 c2 r m c1 l m c m crystal because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 47 figure 14. slow external crystal oscillator (32 khz) electrical characteristics table 33. slow external crystal oscillator (32 khz) electrical characteristics symbol c parameter conditions 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified value 2 2 all values need to be confirmed during device validation. unit min typ max f sxosc sr ? slow external crystal oscillator frequency ? 32 32.768 40 khz g msxosc cc ? slow external crystal oscillator transconductance v dd = 3.3 v 10%, pad3v5v = 1 tbd ma/v v dd = 5.0 v 10% pad3v5v = 0 tbd v dd = 3.3 v 10%, pad3v5v = 1 tbd v dd = 5.0 v 10%, pad3v5v = 0 tbd v sxosc cc t oscillation amplitude ? ? 2.1 ? v i sxoscbias cc t oscillation bias current ? tbd a i sxosc cc t slow external crystal oscillator consumption ???8a t sxoscsu cc t slow external crystal oscillator start-up time ???2 3 3 start-up time has been me asured with epson toyocom mc306 crystal. variation ma y be seen with other crystal s oscon bit (osc_ctl register) t lpxosc32ksu 1 v osc32k_xtal v lpxosc32k valid internal clock 90% 10% 1/f lpxosc32k 0 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 48 3.14 fmpll electrical characteristics the device provides a frequency modulated phase locked loop (fmpll) module to generate a fast system clock from the main oscillator driver. 3.15 fast internal rc oscillator (16 mhz) electrical characteristics the device provides a 16 mhz main internal rc oscillator. this is used as the default clock at the power-up of the device. table 34. fmpll electrical characteristics symbol c parameter conditions 1 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified. value 2 2 all values need to be confirmed during device validation. unit min typ max f pllin sr ? fmpll reference clock 3 3 pllin clock retrieved directly from fxosc clock. input characteristics are granted when oscillator is used in functional mode. when bypass mode is used, oscillator input clock should verify f pllin and pllin . ?4 ? 6 4 m h z pllin sr ? fmpll reference clock duty cycle 3 ?4 0 ? 6 0 % f pllout cc p fmpll output clock frequency ? 16 ? 64 mhz f cpu sr ? system clock frequency ? ? ? 64 4 4 f cpu 64 mhz can be achieved only at up to 105 c mhz f free cc p free-running frequency ? 20 ? 150 mhz t lock cc p fmpll lock time stable oscillator (f pllin = 16 mhz) 40 100 s t ltjit cc ? fmpll long term jitter f pllin = 16 mhz (resonator) , f pllclk @ 64 mhz, 4000 cycles ? ? 10 ns i pll cc c fmpll consumption t a = 25 c ? ? 4 ma table 35. fast internal rc oscillator (16 mhz) electrical characteristics symbol c parameter conditions 1 value 2 unit min typ max f firc cc p fast internal rc oscillator high frequency t a = 25 c, trimmed ? 16 ? mhz sr ? ? 12 20 i fircrun 3, cc t fast internal rc oscillator high frequency current in running mode t a = 25 c, trimmed ? ? 200 a i fircpwd cc d fast internal rc oscillator high frequency current in power down mode t a = 25 c ? tbd 10 a ?t a = 55 c ? tbd tbd because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 49 3.16 slow internal rc oscillator (128 khz) electrical characteristics the device provides a 128 khz low power internal rc oscillator. this can be used as the reference clock for the rtc module. i fircstop cc t fast internal rc oscillator high frequency and system clock current in stop mode t a = 25 c sysclk = off ? 500 ? a sysclk = 2 mhz ? 600 ? sysclk = 4 mhz ? 700 ? sysclk = 8 mhz ? 900 ? sysclk = 16 mhz ? 1250 ? t fircsu cc c fast internal rc oscillator start-up time t a = 55 c v dd = 5.0 v 10% ? 1.1 2.0 s ?v dd = 3.3 v 10% ? 1.2 tbd ?t a = 125 c v dd = 5.0 v 10% ? ? 2.0 ?v dd = 3.3 v 10% ? ? tbd fircpre cc c fast internal rc oscillator precision after software trimming of f firc t a = 25 c ? 1?+1% firctrim cc c fast internal rc oscillator trimming step t a = 25 c ? 1.6 % fircvar cc c fast internal rc oscillator variation over temperature and supply with respect to f firc at t a = 25 c in high-frequency configuration ? ? 5?+5% 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified. 2 all values need to be confirmed during device validation. 3 this does not include consumption linked to clock tree toggling and peripherals consumption when rc oscillator is on. table 36. slow internal rc oscillator (128 khz) electrical characteristics symbol c parameter conditions 1 value 2 unit min typ max f sirc cc p slow internal rc oscillator low frequency t a = 25 c, trimmed ? 128 ? khz sr ? ? 100 ? 150 i sirc 3, cc c slow internal rc oscillator low frequency current t a = 25 c, trimmed ? ? 5 a table 35. fast internal rc oscillator (16 mhz) electrical characteristics (continued) symbol c parameter conditions 1 value 2 unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 50 3.17 adc electrical characteristics 3.17.1 introduction the device provides two successive appr oximation register (sar) analog-to-digital convert ers (10-bit and 12-bit). t sircsu cc p slow internal rc oscillator start-up time t a = 25 c, v dd = 5.0 v 10% ? 8 12 s sircpre cc c slow internal rc oscillator precision after software trimming of f sirc t a = 25 c ? 2?+2% sirctrim cc c slow internal rc oscillator trimming step ??2.7? sircvar cc c slow internal rc oscillator variation in temperature and supply with respect to f sirc at t a = 55 c in high frequency configuration high frequency configuration ? 10 ? +10 % 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified. 2 all values need to be confirmed during device validation. 3 this does not include consumption linked to clock tree toggling and peripherals consumption when rc oscillator is on. table 36. slow internal rc oscillator (128 khz) electrical characteristics (continued) symbol c parameter conditions 1 value 2 unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 51 figure 15. adc0 characteristic and error definitions 3.17.2 input impedance and adc accuracy in the following analysis, the input circuit corres ponding to the precise ch annels is considered. to preserve the accuracy of the a/d converter, it is necessary that analog input pins have low ac impedance. placing a capacito r with good high frequency characteristics at the input pin of th e device can be effective: the capacitor should be as large as possible, ideally infinite. this capacitor contributes to attenuating the noise present on the input pin; furthermore, it sourc es charge during the sampling phase, when the anal og signal source is a high-impedance source. a real filter can typically be obtained by using a series re sistance with a capacitor on the input pin (simple rc filter). the rc filtering may be limited according to the value of source impedance of the tr ansducer or circuit supp lying the analog signal to be measured. the filter at the input pins mu st be designed taking into account the d ynamic characteristics of the input signal (bandwidth) and the equivalent input impedance of the adc itself. (2) (1) (3) (4) (5) offset error ose offset error ose gain error ge 1 lsb (ideal) v in(a) (lsb ideal ) (1) example of an actual transfer curve (2) the ideal transfer curve (3) differential non-linearity error (dnl) (4) integral non-linearity error (inl) (5) center of a step of the actual transfer curve code out 1023 1022 1021 1020 1019 1018 5 4 3 2 1 0 7 6 1 2 3 4 5 6 7 1017 1018 1019 1020 1021 1022 1023 1 lsb ideal = v dd_adc / 1024 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 52 in fact a current sink contri butor is represented by the charge shari ng effects with the sampling capacitance: c s being substantially a switched capacitance, with a frequency equal to the conversion rate of the adc, it can be seen as a resistive p ath to ground. for instance, assuming a conversion rate of 1 mhz, with c s equal to 3 pf, a resistance of 330 k is obtained (r eq = 1 / (fc*c s ), where fc represents the conversion rate at the considered channel). to min imize the error induced by the voltage partitioning between this resistance (sampled voltage on c s ) and the sum of r s + r f + r l + r sw + r ad , the external circuit must be designed to respect the equation 4 : eqn. 4 equation 4 generates a constraint for external network design, in pa rticular on resistive path. in ternal switch resistances (r sw and r ad ) can be neglected with respect to external resistances. figure 16. input equivalent circuit (precise channels) v a r s r f r l r sw r ad +++ + r eq --------------------------------------------------------------------------- ? 1 2 -- -lsb < r f c f r s r l r sw1 c p2 c s v dd sampling source filter current limiter external circuit internal circuit scheme r s source impedance r f filter resistance c f filter capacitance r l current limiter resistance r sw1 channel selection switch impedance r ad sampling switch impedance c p pin capacitance (two contributions, c p1 and c p2 ) c s sampling capacitance c p1 r ad channel selection v a because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 53 figure 17. input equivalent circuit (extended channels) a second aspect involving the capacitance network sha ll be considered. assuming the three capacitances c f , c p1 and c p2 are initially charged at the source voltage v a (refer to the equivalent circuit reported in figure 16 ): a charge sharing phenomenon is installed when the sampling phase is started (a/d switch close). figure 18. transient behavior during sampling phase in particular two different transient periods can be distinguished: 1. a first and quick charge transfer from the internal capacitance c p1 and c p2 to the sampling capacitance c s occurs (c s is supposed initially completely discharged): considering a worst case (since the time constant in reality would be faster) in which c p2 is reported in parallel to c p1 (call c p = c p1 + c p2 ), the two capacitances c p and c s are in series, and the time constant is r f c f r s r l r sw1 c p3 c s v dd sampling source filter current limiter external circuit internal circuit scheme r s source impedance r f filter resistance c f filter capacitance r l current limiter resistance r sw channel selection switch impedance (two contributions r sw1 and r sw2 ) r ad sampling switch impedance c p pin capacitance (three contributions, c p1 , c p2 and c p3 ) c s sampling capacitance c p1 r ad channel selection v a c p2 extended r sw2 switch v a v a1 v a2 t t s v cs voltage transient on c s v < 0.5 lsb 1 2 1 < (r sw + r ad ) c s << t s 2 = r l (c s + c p1 + c p2 ) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 54 eqn. 5 equation 5 can again be simplifi ed considering only c s as an additional worst condition. in reality, the transient is faster, but the a/d converter circuitry has been designed to be robust also in the very worst case: the sampling time t s is always much longer than the internal time constant: eqn. 6 the charge of c p1 and c p2 is redistributed also on c s , determining a new value of the voltage v a1 on the capacitance according to equation 7 : eqn. 7 2. a second charge transfer involves also c f (that is typically bigger than the on- chip capacitance) through the resistance r l : again considering the worst case in which c p2 and c s were in parallel to c p1 (since the time constant in reality would be faster), the time constant is: eqn. 8 in this case, the time constant depends on the external circuit: in particular imposing that the transient is completed well before the end of sampling time t s , a constraints on r l sizing is obtained: eqn. 9 of course, r l shall be sized also according to the current limitation constr aints, in combination with r s (source impedance) and r f (filter resistance). being c f definitively bigger than c p1 , c p2 and c s , then the final voltage v a2 (at the end of the charge transfer tr ansient) will be mu ch higher than v a1 . equation 10 must be respected (charge balance assuming now c s already charged at v a1 ): eqn. 10 the two transients above are not influenced by th e voltage source that, due to the presence of the r f c f filter, is not able to provide the extra charge to comp ensate the voltage drop on c s with respect to the ideal source v a ; the time constant r f c f of the filter is very high with respect to the sampling time (t s ). the filter is ty pically designed to act as anti-aliasing. 1 r sw r ad + () = c p c s ? c p c s + --------------------- ? 1 r sw r ad + () < c s t s ? ? v a1 c s c p1 c p2 ++ () ? v a c p1 c p2 + () ? = 2 r l < c s c p1 c p2 ++ () ? 10 2 ? 10 r l c s c p1 c p2 ++ () ?? =t s < v a2 c s c p1 c p2 c f +++ () ? v a c f ? v a1 +c p1 c p2 +c s + () ? = because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 55 figure 19. spectral representation of input signal calling f 0 the bandwidth of the source signal (and as a conseque nce the cut-off frequency of the anti-aliasing filter, f f ), according to the nyquist theorem the conversion rate f c must be at least 2f 0 ; it means that the constant ti me of the filter is greater than or at least equal to twice the conversion period (t c ). again the conversion period t c is longer than the sampling time t s , which is just a portion of it, even when fixed channel continu ous conversion mode is selected (fastest conversion rate at a specific channel): in conclusion it is evident that the time constant of the filter r f c f is definitively much higher than the sampling time t s , so the charge level on c s cannot be modified by the analog signal source during the time in which the sampling switch is closed. the considerations above lead to impose new constraints on the external circuit, to reduce the accur acy error due to the voltag e drop on c s ; from the two charge balance equations above, it is simple to derive equation 11 between the ideal and real sampled voltage on c s : eqn. 11 from this formula, in the worst case (when v a is maximum, that is for instance 5 v), assuming to accept a maximum error of half a count, a constraint is evident on c f value: adc0 (10-bit) eqn. 12 adc1 (12-bit) eqn. 13 f 0 f analog source bandwidth (v a ) f 0 f sampled signal spectrum (f c = conversion rate) f c f anti-aliasing filter (f f = rc filter pole) f f 2 f 0 < f c (nyquist) f f = f 0 (anti-aliasing filtering condition) t c < 2 r f c f (conversion rate vs. filter pole) noise v a v a2 ----------- - c p1 c p2 +c f + c p1 c p2 +c f c s ++ ------------------------------------------------------- - = c f 2048 c s ?> c f 8192 c s ?> because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 56 3.17.3 adc electrical characteristics table 37. adc input leakage current symbol c parameter conditions value unit min typ max i lkg cc c input leakage current t a = ? 40 c no current injection on adjacent pin ? 1 ? na ct a = 25 c ? 1 ? ct a = 105 c ? 8 200 pt a = 125 c ? 45 400 table 38. adc conversion characteristics (10-bit adc0) symbol c paramete r conditions 1 value unit min typ max v ss_adc0 sr ? voltage on vss_hv_ adc0 (adc0 reference) pin with respect to ground (v ss ) 2 ? ? 0.1 ? 0.1 v v dd_adc0 sr ? voltage on vdd_hv_ adc pin (adc reference) with respect to ground (v ss ) ?v dd ? 0.1 ? v dd +0.1 v v ainx sr ? analog input voltage 3 ?v ss_adc0 ? 0.1 ?v dd_adc0 +0.1 v f adc0 sr ? adc0 analog frequency ? 6? 32 + 4% mhz adc0_sy s sr ? adc0 digital clock duty cycle (ipg_clk) adclksel = 1 4 45 ? 55 % t adc0_pu sr ? adc0 power up delay ? ?? 1.5 s because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 57 t adc0_s cc t sample time 5 f adc = 32 mhz, adc0_conf_sample_i nput = 17 0.5 ? s f adc = 6 mhz, inpsamp = 255 ?42 t adc0_c cc p conversio n time 6 f adc = 32 mhz, adc_conf_comp = 2 0.625 ? s c s cc d adc0 input sampling capacitan ce ??? 3 pf c p1 cc d adc0 input pin capacitan ce 1 ??? 3 pf c p2 cc d adc0 input pin capacitan ce 2 ??? 1 pf c p3 cc d adc0 input pin capacitan ce 3 ??? 1 pf r sw1 cc d internal resistance of analog source ??? 3 k r sw2 cc d internal resistance of analog source ? ? ? 2 k r ad cc d internal resistance of analog source ??? 2 k i inj sr ? input current injection current injection on one adc0 input, different from the converted one v dd = 3.3 v 10% ? 5? 5 ma v dd = 5.0 v 10% ? 5 ? 5 table 38. adc conversion characteristics (continued)(10-bit adc0) symbol c paramete r conditions 1 value unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 58 | inl | cc t absolute value for integral non-linear ity no overload ? 0.5 1.5 lsb | dnl | cc t absolute differential non-linear ity no overload ? 0.5 1.0 lsb | ofs | cc t absolute offset error ?? 0.5 ? lsb | gne | cc t absolute gain error ?? 0.6 ? lsb tuep cc p to t a l unadjuste d error 7 for precise channels, input only pins without current injection ? 2 0.6 2 lsb t with current injection ? 3 3 tuex cc t to t a l unadjuste d error 7 for extended channel without current injection ? 3 1 3 lsb t with current injection ? 4 4 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = ? 40 to 125 c, unless otherwise specified. 2 analog and digital v ss must be common (to be tied together externally). 3 v ainx may exceed v ss_adc0 and v dd_adc0 limits, remaining on absolute maximu m ratings, but the results of the conversion will be clamped respectively to 0x000 or 0x3ff. 4 duty cycle is ensured by using syst em clock without prescaling. when adcl ksel = 0, the duty cycle is ensured by internal divider by 2. 5 during the sample time the input capacitance c s can be charged/discharged by t he external source. the internal resistance of the analog source must allow the capa citance to reach its final voltage level within t adc0_s . after the end of the sample time t adc0_s , changes of the analog input voltage have no effect on the conversion result. values for the sample clock t adc0_s depend on programming. 6 this parameter does not include the sample time t adc0_s , but only the time for determining the digital result and the time to load the result?s register with the conversion result. 7 total unadjusted error: the maximum erro r that occurs without adjusting offset and gain errors. this error is a combination of offset, gain and integral linearity errors. table 38. adc conversion characteristics (continued)(10-bit adc0) symbol c paramete r conditions 1 value unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 59 figure 20. adc1 characteristic and error definitions (2) (1) (3) (4) (5) offset error ose offset error ose gain error ge 1 lsb (ideal) v in(a) (lsb ideal ) (1) example of an actual transfer curve (2) the ideal transfer curve (3) differential non-linearity error (dnl) (4) integral non-linearity error (inl) (5) center of a step of the actual transfer curve code out 4095 4094 4093 4092 4091 4090 5 4 3 2 1 0 7 6 1 2 3 4 5 6 7 4090 4091 4092 4093 4094 4095 1 lsb ideal = avdd / 4096 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 60 table 39. conversion characteristics (12-bit adc1) symbol parameter conditions 1 value unit min typ max v ss_adc1 sr voltage on vss_hv_a dc1 (adc1 reference) pin with respect to ground (v ss ) 2 ?- 0 . 1 0 . 1v v dd_adc1 sr voltage on vdd_hv_ adc1 pin (adc1 reference) with respect to ground (v ss ) ?v dd -0.1 v dd +0.1 v v ainx sr analog input voltage 3 ?v ss_adc1 -0 .1 v dd_adc1 + 0.1 v f adc1 sr adc1 analog frequency ? 32 + 3% 32 + 4% mhz t adc1_pu sr adc1 power up delay ? 1.5 s t adc1_s cc sample time 4 vdd=3.3 v f adc1 = 32 mhz, adc1_conf_sample_inp ut = 20 600 ns sample time 4 vdd =5.0 v f adc1 = 32 mhz, adc1_conf_sample_inp ut = 17 500 sample time 4 vdd=3.3 v f adc1 = 3.33 mhz, adc1_conf_sample_inp ut = 255 76.2 s sample time 4 vdd =5.0 v f adc1 = 3.33 mhz, adc1_conf_sample_inp ut = 255 76.2 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 61 t adc1_c cc conversion time 5 vdd=3.3 v f adc1 = 20mhz, adc1_conf_comp = 0 2.4 s conversion time 5 vdd =5.0 v f adc 1 = 13.33 mhz, adc1_conf_comp = 0 1.5 s conversion time 5 vdd=3.3 v f adc 1 = 13.33 mhz, adc1_conf_comp = 0 3.6 s conversion time 5 vdd =5.0 v f adc1 = 32 mhz, adc1_conf_comp = 0 3.6 s adc0_sys sr adc1 digital clock duty cycle (ipg_clk) adclksel = 1 6 45 ?55 % c s cc adc1 input sampling capacitanc e ?5 pf c p1 cc adc1 input pin capacitanc e 1 ?3 pf c p2 cc adc1 input pin capacitanc e 2 ?1 pf c p3 cc adc1 input pin capacitanc e 3 ?1 . 5 pf r sw1 cc internal resistance of analog source ?1 k r sw2 cc internal resistance of analog source ?2 k r ad cc internal resistance of analog source ?0 . 3 k table 39. conversion characteristics (12-bit adc1) (continued) symbol parameter conditions 1 value unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 62 i inj sr input current injection current injection on one adc1 input, different from the converted one v dd = 3.3 v 10% -5 ? 5 ma v dd = 5.0 v 10% -5 ? 5 inlp cc absolute integral non-linearit y-precise channels no overload 1 3 lsb inlx cc absolute integral non-linearit y-extended channels no overload 1.5 5 lsb dnl cc absolute differential non-linearit y no overload 0.5 1 lsb ofs cc absolute offset error ?2 lsb gne cc absolute gain error ?2 lsb tuep 7 cc to t a l unadjusted error for precise channels, input only pins without current injection -6 6 with current injection -8 8 tuex 7 cc to t a l unadjusted error for extended channel without current injection -10 10 lsb with current injection -12 12 lsb 1 v dd = 3.3 v 10% / 5.0 v 10%, t a = -40 / 125 c, unless otherwise specified. 2 analog and digital v ss must be common (to be tied together externally). 3 v ainx may exceed v ss_adc1 and v dd_adc1 limits, remaining on absolute maximu m ratings, but the results of the conversion will be clamped respectively to 0x000 or 0xfff. 4 during the sample time the input capacitance c s can be charged/discharged by t he external source. the internal resistance of the analog source must allow the capa citance to reach its final voltage level within t adc1_s . after the end of the sample time t adc1_s , changes of the analog input voltage have no effect on the conversion result. values for the sample clock t adc1_s depend on programming. table 39. conversion characteristics (12-bit adc1) (continued) symbol parameter conditions 1 value unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 63 5 this parameter does not include the sample time t adc1_s , but only the time for determining the digital result and the time to load the result?s register with the conversion result. 6 duty cycle is ensured by using syst em clock without prescaling. when adcl ksel = 0, the duty cycle is ensured by internal divider by 2. 7 total unadjusted error: the maximum erro r that occurs without adjusting offset and gain errors. this error is a combination of offset, gain and integral linearity errors. because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 64 3.18 on-chip peripherals 3.18.1 current consumption table 40. on-chip peripherals current consumption 1 symbol c parameter conditions value unit min typ max i dd_bv(can ) cc t can (flexcan) supply current on v dd_bv 500 kbps total (static + dynamic) consumpti on: ? flexcan in loop-ba ck mode ?xtal@8 mhz used as can engine clock source ? message sending period is 580 s 7.652 * f periph + 84.73 a 125 kbps 8.0743 * f periph + 26.757 i dd_bv(emi os) cc t emios supply current on v dd_bv static consumption: ? emios channel off ? global prescaler enabled 28.7 * f periph dynamic consumption: ? it does not change varying the frequency (0.003 ma) 3 i dd_bv(sci) cc t sci (linflex) supply current on v dd_bv total (static + dynamic) consumption: ? lin mode ? baudrate: 20 kbps 4.7804 * f periph + 30.946 i dd_bv(spi) cc t spi (dspi) supply current on v dd_bv ballast static consumption (only clocked) 1 ballast dynamic consumption (continuus communication): ? baudrate: 2 mbit ? trasmission every 8 s ? frame: 16 bits 16.3 * f periph because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 65 i dd_bv(adc ) cc t adc supply current on v dd_bv v dd = 5.5 v ballast static consumpti on (no conversion ) 0.0409 * f periph ma v dd = 5.5 v ballast dynamic consumpti on (continuus conversion ) 0.0049 * f periph i dd_hv_ad c(adc) cc t adc supply current on v dd_hv_ad c v dd = 5.5 v analog static consumpti on (no conversion ) 0.0017 * f periph v dd = 5.5 v analog dynamic consumpti on (continuus conversion ) 0.075 * f periph + 0.032 i dd_hv(fla sh) cc t cflash + dflash supply current on v dd_hv_ad c v dd = 5.5 v - 13.25 i dd_hv(pll) cc t pll supply current on v dd_hv v dd = 5.5 v - 0.0031 * f periph 1 operating conditions: t a = 25 c, f periph = 8 mhz to 64 mhz table 40. on-chip peripherals current consumption 1 (continued) symbol c parameter conditions value unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 66 3.18.2 dspi characteristics table 41. dspi characteristics no. symbol c parameter value unit min typ max 1t sck sr d sck cycle time 64 ? ? ns ?f dspi sr d dspi digital controller frequency ??f cpu mhz ? t csc cc d internal delay between pad associated to sck and pad associated to csn in master mode ??120 1 ns 2t cscext 2 cc d cs to sck delay master mode t cscext = t csc + t csc ns sr d slave mode 32 ? ? 3t ascext 3 cc d after sck delay master mode t ascext = t asc + t csc ns sr d slave mode 1/f dspi + 5 ns ??ns 4t sdc cc d sck duty cycle master mode ?t sck/2 ?ns sr d slave mode t sck/2 ?? 5t a sr d slave access time ?27??ns 6t di sr d slave sout disable time ?0??ns 7t sui sr d data setup time for inputs master (mtfe = 0) 35 ? ? ns slave 5 ? ? master (mtfe = 1) 35 ? ? 8t hi sr d data hold time for inputs master (mtfe = 0) 0??ns slave 2 4 ?? master (mtfe = 1) 0?? because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 67 9t suo 5 cc d data valid after sck edge master (mtfe = 0) ? ? 32 ns slave ? ? 34 master (mtfe = 1) ??32 10 t ho 5 cc d data hold time for outputs master (mtfe = 0) 2??ns slave 5.5 ? ? master (mtfe = 1) 2?? 1 maximum is reached when csn pad is configured as slow pad while sck pad is configured as medium pad. 2 the t csc delay value is configurable through a register. when configuring t csc (using pcssck and cssck fields in dspi_ctarx registers), delay between internal cs and internal sck must be higher than t csc to ensure positive t cscext . 3 the t asc delay value is configurable through a register. when configuring t asc (using pasc and asc fields in dspi_ctarx registers), delay between internal cs and internal sck must be higher than t asc to ensure positive t ascext . 4 this delay value corresponds to smpl_pt = 00b wh ich is bit field 9 and 8 of dspi_mcr register. 5 sck and sout configured as medium pad table 41. dspi characteristics (continued) no. symbol c parameter value unit min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 68 figure 21. dspi classic spi timing - master, cpha = 0 figure 22. dspi classic spi timing - master, cpha = 1 data last data first data first data data last data sin sout pcsx sck output 4 9 12 1 11 10 4 sck output (cpol = 0) (cpol = 1) 3 2 note: numbers shown reference ta b l e 4 1 . data last data first data sin sout 12 11 10 last data data first data sck output sck output pcsx 9 (cpol = 0) (cpol = 1) note: numbers shown reference ta bl e 4 1 . because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 69 figure 23. dspi classic spi timing - slave, cpha = 0 figure 24. dspi classic spi timing - slave, cpha = 1 last data first data 3 4 1 data data sin sout ss 4 5 6 9 11 10 12 sck input first data last data sck input 2 (cpol = 0) (cpol = 1) note: numbers shown reference ta bl e 4 1 . 5 6 9 12 11 10 last data last data sin sout ss first data first data data data sck input sck input (cpol = 0) (cpol = 1) note: numbers shown reference ta bl e 4 1 . because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 70 figure 25. dspi modified transfer format timing - master, cpha = 0 figure 26. dspi modified transfer format timing - master, cpha = 1 pcsx 3 1 4 10 4 9 12 11 sck output sck output sin sout first data data last data first data data last data 2 (cpol = 0) (cpol = 1) note: numbers shown reference ta bl e 4 1 . pcsx 10 9 12 11 sck output sck output sin sout first data data last data first data data last data (cpol = 0) (cpol = 1) note: numbers shown reference ta bl e 4 1 . because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 71 figure 27. dspi modified transfer format timing - slave, cpha = 0 figure 28. dspi modified transfer format timing - slave, cpha = 1 last data first data 3 4 1 data data sin sout ss 4 5 6 9 11 10 sck input first data last data sck input 2 (cpol = 0) (cpol = 1) 12 note: numbers shown reference ta b l e 4 1 . 5 6 9 12 11 10 last data last data sin sout ss first data first data data data sck input sck input (cpol = 0) (cpol = 1) note: numbers shown reference ta bl e 4 1 . because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 72 figure 29. dspi pcs strobe (pcss ) timing pcsx 7 8 pcss note: numbers shown reference ta bl e 4 1 . because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages electrical characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 73 3.18.3 nexus characteristics figure 30. nexus tdi, tms, tdo timing table 42. nexus characteristics no. symbol c parameter value unit min typ max 1t tcyc cc d tck cycle time 64 ? ? ns 2t mcyc cc d mcko cycle time 32 ? ? ns 3t mdov cc d mcko low to mdo data valid ? ? 8 ns 4t mseov cc d mcko low to mseo_b data valid ? ? 8 ns 5t evtov cc d mcko low to evto data valid ? ? 8 ns 6t ntdis cc d tdi data setup time 15 ? ? ns t ntmss cc d tms data setup time 15 ? ? ns 7t ntdih cc d tdi data hold time 5 ? ? ns t ntmsh cc d tms data hold time 5 ? ? ns 8t tdov cc d tck low to tdo data valid 35 ? ? ns 9t tdoi cc d tck low to tdo data invalid 6 ? ? ns 10 tck tms, tdi tdo 11 12 note: numbers shown reference ta bl e 4 2 . because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 74 3.18.4 jtag characteristics figure 31. timing diagram - jtag boundary scan table 43. jtag characteristics no. symbol c parameter value unit min typ max 1t jcyc cc d tck cycle time 64 ? ? ns 2t tdis cc d tdi setup time 15 ? ? ns 3t tdih cc d tdi hold time 5 ? ? ns 4t tmss cc d tms setup time 15 ? ? ns 5t tmsh cc d tms hold time 5 ? ? ns 6t tdov cc d tck low to tdo valid ? 33 ns 7t tdoi cc d tck low to tdo invalid 6 ? ? ns input data valid output data valid data inputs data outputs data outputs tck note: numbers shown reference ta bl e 4 3 . 3/5 2/4 7 6 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 75 4 package characteristics 4.1 package mechanical data 4.1.1 176 lqfp figure 32. 176 lqfp package mechanical drawing (part 1 of 3) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package characteristics freescale semiconductor 76 figure 33. 176 lqfp package mechanical drawing (part 2 of 3) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 77 figure 34. 176 lqfp package mechanical drawing (part 3 of 3) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package characteristics freescale semiconductor 78 table 44. lqfp176 mechanical data 1 1 controlling dimension: millimeter symbol mm inches 2 2 values in inches are converted from mm and rounded to 4 decimal digits. min typ max min typ max a 1.400 1.600 0.063 a1 0.050 0.150 0.002 a2 1.350 1.450 0.053 0.057 b 0.170 0.270 0.007 0.011 c 0.090 0.200 0.004 0.008 d 23.900 24.100 0.941 0.949 e 23.900 24.100 0.941 0.949 e 0.500 0.020 hd 25.900 26.100 1.020 1.028 he 25.900 26.100 1.020 1.028 l 3 3 l dimension is measured at gauge plane at 0.25 mm above the seating plane 0.450 0.750 0.018 0.030 l1 1.000 0.039 zd 1.250 0.049 ze 1.250 0.049 q 0 7 0 7 tolerance mm inches ccc 0.080 0.0031 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 79 4.1.2 144 lqfp figure 35. 144 lqfp package mechanical drawing (part 1 of 2) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package characteristics freescale semiconductor 80 figure 36. 144 lqfp package mechanical drawing (part 2 of 2) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 81 table 45. lqfp144 mechanical data symbol mm inches 1 1 values in inches are converted from mm and rounded to 4 decimal digits. min typ max min typ max a 1.600 0.0630 a1 0.050 0.150 0.0020 0.0059 a2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 0.200 0.0035 0.0079 d 21.800 22.000 22.200 0.8583 0.8661 0.8740 d1 19.800 20.000 20.200 0.7795 0.7874 0.7953 d3 17.500 0.6890 e 21.800 22.000 22.200 0.8583 0.8661 0.8740 e1 19.800 20.000 20.200 0.7795 0.7874 0.7953 e3 17.500 0.6890 e 0.500 0.0197 l 0.450 0.600 0.750 0.0177 0.0236 0.0295 l1 1.000 0.0394 k 0.0 3.5 7.0 3.5 0.0 7.0 tolerance mm inches ccc 0.080 0.0031 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package characteristics freescale semiconductor 82 4.1.3 100 lqfp figure 37. 100 lqfp package mechanical drawing (part 1 of 3) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 83 figure 38. 100 lqfp package mechanical drawing (part 2 of 3) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package characteristics freescale semiconductor 84 figure 39. 100 lqfp package mechanical drawing (part 3 of 3) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 85 table 46. lqfp100 mechanical data symbol mm inches 1 1 values in inches are converted from mm and rounded to 4 decimal digits. min typ max min typ max a 1.600 0.0630 a1 0.050 0.150 0.0020 0.0059 a2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 0.200 0.0035 0.0079 d 15.800 16.000 16.200 0.6220 0.6299 0.6378 d1 13.800 14.000 14.200 0.5433 0.5512 0.5591 d3 12.000 0.4724 e 15.800 16.000 16.200 0.6220 0.6299 0.6378 e1 13.800 14.000 14.200 0.5433 0.5512 0.5591 e3 12.000 0.4724 e 0.500 0.0197 l 0.450 0.600 0.750 0.0177 0.0236 0.0295 l1 1.000 0.0394 k 0 . 03 . 57 . 00 . 03 . 57 . 0 tolerance mm inches ccc 0.080 0.0031 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package characteristics freescale semiconductor 86 4.1.4 208mapbga figure 40. 208 mapbga package mechanical drawing (part 1 of 2) because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages package characteristics MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 87 figure 41. 208 mapbga package mechanical drawing (part 2 of 2) table 47. lbga208 mechanical data symbol mm inches 1 notes min typ max min typ max a 1.70 0.0669 2 a1 0.30 0.0118 a2 1.085 0.0427 a3 0.30 0.0118 a4 0.80 0.0315 b 0.50 0.60 0.70 0.0197 0.0236 0.0276 3 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice package characteristics freescale semiconductor 88 d 16.80 17.00 17.20 0.6614 0.6693 0.6772 d1 15.00 0.5906 e 16.80 17.00 17.20 0.6614 0.6693 0.6772 e1 15.00 0.5906 e 1.00 0.0394 f 1.00 0.0394 ddd 0.20 0.0079 eee 0.25 0.0098 4 fff 0.10 0.0039 5 1 values in inches are converted from mm and rounded to 4 decimal digits. 2 lbga stands for l ow profile b all g rid a rray. - low profile: the total profile height (dim a) is measured from the seat ing plane to the top of the component - the maximum total package height is calculated by the following methodology: a2 typ+a1 typ + (a1 2 +a3 2 +a4 2 tolerance values) - low profile: 1.20mm < a < 1.70mm 3 the typical ball diameter before mounting is 0.60mm. 4 the tolerance of position that contro ls the location of the pattern of balls with respect to datums a and b. for each ball there is a cylindrical tolerance zone eee perp endicular to datum c and located on true position with respect to datums a and b as defined by e. the axis perp endicular to datum c of each ball must lie within this tolerance zone. 5 the tolerance of position that controls the location of the balls within th e matrix with respect to each other. for each ball there is a cylindrical tolerance zone fff pe rpendicular to datum c and located on true position as defined by e. the axis perpendicular to datum c of each ball must lie within this tolerance zone. each tolerance zone fff in the array is cont ained entirely in the respective zone eee above. the axis of each ball must lie si multaneously in both tolerance zones. table 47. lbga208 mechanical data (continued) symbol mm inches 1 notes min typ max min typ max because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages ordering information MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 89 5 ordering information figure 42. commercial product code structure 1 208 mapbga available only as de velopment package for nexus2+ qualification status powerpc core automotive platform core version flash size (core dependent) product optional fields mpc56 bemll example code: 07 temperature spec. package code qualification status m = mc status s = auto qualified p = pc status automotive platform 56 = ppc in 90nm 57 = ppc in 65nm flash size (z0 core) 5 = 768 kb 6 = 1024 kb 7 = 1.5 mb product b = body c = gateway r = tape & reel (blank if tray) r temperature spec. c = ?40 c to 85c v = ?40 c to 105c m = ?40 c to 125c package code ll = 100 lqfp lq = 144 lqfp lu= 176 lqfp because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice revision history freescale semiconductor 90 6 revision history table 48 summarizes revisions to this document. table 48. revision history revision date substantive changes 1 12-jan-2009 initial release 2 09 nov-2009 updated features -replaced 27 irqs in place of 23 -adc features -external ballast resistor support conditions -updated device summary-added 208 bga details -updated block diagram to include wkup -updated block diagram to include 5 ch adc 12 -bit -updated block summary table -updated lqfp 144, 176 and 100 pinouts. applied new naming convention for adc signals as adcx_p[x] and adcx_s[x] section 1, ?general description -updated bolero 1.5m device comparison table -updated block diagram-aligned with 512k -updated block summary-aligned with 512k section 2, ?package pinouts -updated 100,144,176,208 packages according to cut2.0 changes added section 3.5.1, ?external ballast resistor recommendations added nvusro [watchdog_en] field description updated absolute maximum ratings updated lqfp thermal characteristics updated i/o supply segments updated voltage regulator capacitance connection updated low voltage monitor electrical characteristics updated low voltage power domain electrical characteristics updated dc electrical characteristics updated program/erase specifications updated conversion characteristics (10 bit adc) updated fmpll electrical characteristics updated fast rc oscillator electrical characteristics-aligned with bolero 512k updated on-chip peripherals current consumption updated adc characteristics and error definitions diagram updated adc conversion characteristics (10 bit and 12 bit) added adc characteristics and error definitions diagram for 12 bit adc 3 25 jan-2010 updated features updated block diagram to connect peripherals to pad i/o updated block summary to include adc 12-bit updated 144, 176 and 100 pinouts to adjust format issues table 26 flash module life-retention value changed from 1-5 to 5 yrs minor editing changes because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages abbreviations MPC5607B microcontroller data sheet, rev. 3 preliminary?subject to change without notice freescale semiconductor 91 appendix a abbreviations table 49 lists abbreviations used but not defined elsewhere in this document. table 49. abbreviations abbreviation meaning cmos complementary metal?oxide?semiconductor cpha clock phase cpol clock polarity cs peripheral chip select evto event out led light emitting diode mcko message clock out mdo message data out mseo message start/end out mtfe modified timing format enable sck serial communications clock sout serial data out tbd to be defined tck test clock input tdi test data input tdo test data output tms test mode select because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor china ltd. exchange building 23f no. 118 jianguo road chaoyang district beijing 100022 china +86 10 5879 8000 support.asia@freescale.com freescale semiconductor literature distribution center 1-800-441-2447 or +1-303-675-2140 fax: +1-303-675-2150 ldcforfreescalesemiconduc tor@hibbertgroup.com information in this document is provided solely to enable system and software implementers to use freescale semiconductor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale semiconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemnify and hold freescale semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. the described product contains a powerpc processor core. the powerpc name is a trademark of ibm corp. and used under license. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc. 2009. all rights reserved. MPC5607B rev. 3 01/2010 because of an order from the united states international trade commission, bga-packaged product lines and part numbers indicated here currently are not available from freescale for import or sale in the united states prior to september 2010: mpc560xb products in 208 mapbga packages |
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